1. Manuals
  2. Brands
  3. Dynamic Engineering Manuals
  4. PCI Card
  5. PCIe8LXMCX2CB
  6. User manual

Dynamic Engineering PCIe8LXMCX2CB User Manual

Pcie 8 lane 2 position xmc compatible carrier. connector bus version
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
DYNAMIC ENGINEERING
150 Dubois St. Suite C, Santa Cruz, CA 95060
831-457-8891
Fax 831-457-4793
http://www.dyneng.com
sales@dyneng.com
Est. 1988
User Manual
PCIe8LXMCX2CB
PCIe 8 Lane 2 Position XMC Compatible Carrier
Connector Bus Version
Shown With JN4 full CB, 4 fans installed, AP power connector
Revision A2 9/6/17
Corresponding Hardware: Revision A
Fab number 10-2017-0501

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the PCIe8LXMCX2CB and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for Dynamic Engineering PCIe8LXMCX2CB

Summary of Contents for Dynamic Engineering PCIe8LXMCX2CB

  • Page 1 DYNAMIC ENGINEERING 150 Dubois St. Suite C, Santa Cruz, CA 95060 831-457-8891 Fax 831-457-4793 http://www.dyneng.com sales@dyneng.com Est. 1988 User Manual PCIe8LXMCX2CB PCIe 8 Lane 2 Position XMC Compatible Carrier Connector Bus Version Shown With JN4 full CB, 4 fans installed, AP power connector...
  • Page 2 Dynamic Engineering has made every effort to ensure that this manual is accurate and complete. Still, the company reserves the right...

  • Page 3: Table Of Contents

    Table of Contents PRODUCT DESCRIPTION Headers and TestPoints DipSwitch Settings Options XMC Module Backplane IO Interface Pin Assignment XMC Module IO Resistor Selection XMC Module Connector Resistor Selection APPLICATIONS GUIDE Interfacing Construction and Reliability Thermal Considerations WARRANTY AND REPAIR Service Policy Out of Warranty Repairs For Service Contact: SPECIFICATIONS...

  • Page 4: Product Description

    Too many to have a standardized table of options. Contact Dynamic Engineering with your requirement. We will create a new -# to cover your configuration. A small charge is required to cover the cost of an updated programming file for the PnP and test program.
  • Page 5 • Optional Fan(s) for increased airflow • JTAG programming support • DIP switch to select global addressing on XMC’s The PCIe8LXMCX2CB is ready to use with the default settings. Just install the XMC(s) onto PCIe8LXMCX2CB and then into the system. Embedded Solutions...

  • Page 6: Headers And Testpoints

    Headers and TestPoints are used to select the VPWR source for position 0 and 1 respectively. When the Shunt closes 1-2 – 12V is selected. With 2-3 closed 5V is selected. FET’s are used to provide a low impedance path from the power supplies to VPWR for each position.

  • Page 7: Dipswitch Settings

    J4, J5 control the power sequencing for 3.3V and 5V respectively. 1-2 selects a delayed start-up of the power supply, 2-3 for immediate start-up [based on 12V available] and open is off [used for power savings when a supply is not required. Added with Rev 03 boards.

  • Page 8: Options

    Options Dynamic Engineering offers multiple versions of the PCIe8LXMCX2CB design. PCIe8LXMCX2CB features cooling cutouts designed to support the addition of a fan in one or two positions for each XMC. On PrXMC's and other XMC’s with high thermal loads the fan option is a good idea. On cards with a lower thermal profile the fan is not needed.
  • Page 9 Pin A1 is the lower left corner pin. Pin C1 corresponds to the cable wire number 1 for a standard header inserted into the connector on the PCIe8LXMCX2CB. The mating parts are available from a number of manufacturers. Cables and breakouts are available from Dynamic Engineering – Please see DINterm64 and DINribn64 or HDEcabl68 and HDEterm68 products from the Dynamic Engineering website.

  • Page 10: Xmc Module Backplane Io Interface Pin Assignment

    The figure below gives the pin assignments for the XMC Module IO Interface – from Jn4 and/or Jn6 to the PCIe8LXMCX2CB connectors. Also see the User Manual for your XMC board for more information. Please note that P2 or P13, P7 or P5 are installed not both.

  • Page 11: Xmc Module Io Resistor Selection

    XMC Module IO Resistor Selection XMC0 XMC1 Signal R IO R CB R CB R IO Signal IO0_0P IO1_0P IO0_0N IO1_0N IO0_1P IO1_1P IO0_1N IO1_1N IO0_2P IO1_2P IO0_2N IO1_2N IO0_3P IO1_3P IO0_3N IO1_3N IO0_4P IO1_4P IO0_4N IO1_4N IO0_5P IO1_5P IO0_5N IO1_5N IO0_6P IO1_6P...
  • Page 12 IO0_31N IO1_31N FIGURE 2 PCIE8LXMCX2CB RESISTOR SELECTION IO IO0 refers to XMC 0 and IO1 refers to XMC1. Resistors are numbered with the “R” implied (not shown in table). The first and fourth resistor columns are for the standard IO – SCSI or DIN connector for IO0/IO1. The second and third resistor columns are for the Connector Bus between XMC0 and XMC1.

  • Page 13: Xmc Module Connector Resistor Selection

    XMC Module Connector Resistor Selection XMC0 XMC1 Signal Signal IO0_0P IO1_0P IO0_0N IO1_0N IO0_1P IO1_1P IO0_1N IO1_1N IO0_2P IO1_2P IO0_2N IO1_2N IO0_3P IO1_3P IO0_3N IO1_3N IO0_4P IO1_4P IO0_4N IO1_4N IO0_5P IO1_5P IO0_5N IO1_5N IO0_6P IO1_6P IO0_6N IO1_6N IO0_7P IO1_7P IO0_7N IO1_7N IO0_8P IO1_8P...
  • Page 14 IO0_31N IO1_31N FIGURE 3 PCIE8LXMCX2CB RESISTOR SELECTION CONNECTOR IO0 refers to XMC 0 and IO1 refers to XMC1. Resistors are numbered with the “R” implied (not shown in table). With the RP [Jn4] and/or RX[Jn6] resistors installed the respective connectors are tied into the IO selection matrix.

  • Page 15: Applications Guide

    Power all system power supplies from one switch. Connecting external voltage to the PCIe8LXMCX2CB when it is not powered can damage it, as well as the rest of the host system. This problem may be avoided by turning all power supplies on and off at the same time.

  • Page 16: Construction And Reliability

    Cooling cutouts are designed into the product for improved air flow to the XMC sites. The components on the PCIe8LXMCX2CB are tied into the internal power planes to spread the dissipated heat out over a larger area. This is an effective cooling technique in the situation where a large portion of the board has little or no power dissipation.

  • Page 17: Warranty And Repair

    For service on Dynamic Engineering Products not purchased directly from Dynamic Engineering contact your reseller. Products returned to Dynamic Engineering for repair by other than the original customer will be treated as out-of-warranty.

  • Page 18: Specifications

    Specifications Logic Interfaces: PCIe up to 8 lanes per XMC Gen1 and Gen2 compliant switch and clock buffer. Access types: PCIe TLP transactions. MSI interrupts. CLK rates supported: Gen1 and Gen2 Software Interface: switch is auto configured and usually will not require any user intervention.

  • Page 19: Order Information

    Order Information ø standard temperature range -40ó85 PCIe8LXMCX2CB full length PCIe card with 2 XMC positions DIN connectors installed. User VPWR selection http://www.dyneng.com/PCIe8LXMCX2CB.html -FAN(1,2,3,4)R [fan installed in position 1 or 2 or 3 or 4 or combinations] “R” for rear mounted higher velocity fans(~8 CFM).
  • Page 20 . For example 1.0.FT = 1 Ft long. 1.6Ft is 1 Foot 6”. Metric and English units are acceptable. 36” is the default length if XX.YY.ZZ is left off. All information provided is Copyright Dynamic Engineering Embedded Solutions Page 20...

Table of Contents