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SPECIFICATIONS
PXIe-5763
PXI FlexRIO Digitizer
This document lists the specifications for the PXIe-5763. Specifications are subject to change
without notice. For the most recent device specifications, refer to ni.com/support.
Note
Using the PXIe-5763 in a manner not described in this document might
impair the protection the PXIe-5763 provides.
Note
These specifications are typical at 25 °C unless otherwise noted.
Note
Specifications are valid under the following conditions unless otherwise
noted:
•
The chassis fan speed is set to HIGH, the foam fan filters are removed if
present, and the empty slots contain PXI chassis slot blockers and filler panels.
For more information about cooling, refer to the Maintain Forced-Air Cooling
Note to Users at ni.com/manuals.
Contents
Definitions.................................................................................................................................2
Digital I/O................................................................................................................................. 2
Digital I/O Single-Ended Channels...................................................................................3
Digital I/O High-Speed Serial MGT................................................................................. 3
Reconfigurable FPGA...............................................................................................................5
Onboard DRAM........................................................................................................................5
Analog Input............................................................................................................................. 6
General Characteristics..................................................................................................... 6
Typical Specifications....................................................................................................... 6
CLK/REF IN........................................................................................................................... 13
General Characteristics................................................................................................... 13
Driver and Application Software............................................................................................ 16
Bus Interface........................................................................................................................... 16
Maximum Power Requirements..............................................................................................17
Physical................................................................................................................................... 17
Environment............................................................................................................................17
Operating Environment...................................................................................................17
Storage Environment.......................................................................................................18
Shock and Vibration................................................................................................................18
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Summary of Contents for National Instruments PXIe-5763
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Page 1: Table Of Contents
SPECIFICATIONS PXIe-5763 PXI FlexRIO Digitizer This document lists the specifications for the PXIe-5763. Specifications are subject to change without notice. For the most recent device specifications, refer to ni.com/support. Note Using the PXIe-5763 in a manner not described in this document might impair the protection the PXIe-5763 provides. -
Page 2: Definitions
Xilinx UltraScale GTH Output MGT Rx± <3..0> Xilinx UltraScale GTH Input DIO <7..0> Single-ended Bidirectional 5.0 V Output Ground — Multi-gigabit transceiver (MGT) signals are available on devices with KU040 and KU060 FPGAs only. 2 | ni.com | PXIe-5763 Specifications... -
Page 3: Digital I/O Single-Ended Channels
Number of Rx channels I/O AC coupling capacitor 100 nF Voltage levels are guaranteed by design through the digital buffer specifications. For detailed FPGA and High-Speed Serial Link specifications, refer to Xilinx documentation. PXIe-5763 Specifications | © National Instruments | 3... - Page 4 150 mV to 1250 mV , nominal pk-pk pk-pk Differential input resistance 100 Ω, nominal I/O coupling DC-coupled, requires external capacitor 800 mV when transmitter output swing is set to the maximum setting. pk-pk 4 | ni.com | PXIe-5763 Specifications...
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Page 5: Reconfigurable Fpga
Reconfigurable FPGA PXIe-5763 modules are available with multiple FPGA options. The following table lists the FPGA specifications for the PXIe-5763 FPGA options. Table 3. Reconfigurable FPGA Options KU035 KU040 KU060 LUTs 203,128 242,200 331,680 DSP48 slices (25 × 18 1,700... -
Page 6: Analog Input
Only one analog input path type is populated. You must provide a 1 GHz clock at the CLK/REF IN front panel connector to enable this rate. Normalized to 10 MHz. Upper -3 dB bandwidth limited by ADC decimation filter. 6 | ni.com | PXIe-5763 Specifications... - Page 7 Noise spectral density is verified using a 50 Ω terminator connected to the input. Measured with a -1 dBFS signal and corrected to full-scale. 1 kHz resolution bandwidth. Calculated from SINAD and corrected to full scale. PXIe-5763 Specifications | © National Instruments | 7...
- Page 8 Figure 2. AC-Coupled Single Tone Spectrum (10.1 MHz, -1 dBFS, 1 kHz RBW), Measured Figure 3. AC-Coupled Single Tone Spectrum (123.1 MHz, -1 dBFS, 1 kHz RBW), Measured 8 | ni.com | PXIe-5763 Specifications...
- Page 9 Figure 4. DC-Coupled Single Tone Spectrum (10.1 MHz, -1 dBFS, 1 kHz RBW), Measured PXIe-5763 Specifications | © National Instruments | 9...
- Page 10 Figure 5. DC-Coupled Single Tone Spectrum (123.1 MHz, -1 dBFS, 1 kHz RBW), Measured Channel-to-channel crosstalk AC-coupled, characteristic 10 MHz -87 dB 100 MHz -89 dB 225 MHz -85 dB Channel-to-channel crosstalk DC-coupled, characteristic 1 MHz -94 dB 100 MHz -83 dB 225 MHz -78 dB 10 | ni.com | PXIe-5763 Specifications...
- Page 11 Figure 6. AC-Coupled Frequency Response, Measured Figure 7. AC-Coupled Frequency Response Zoomed In, Measured PXIe-5763 Specifications | © National Instruments | 11...
- Page 12 Figure 8. DC-Coupled Frequency Response, Measured Figure 9. DC-Coupled Frequency Response Zoomed In, Measured 12 | ni.com | PXIe-5763 Specifications...
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Page 13: Clk/Ref In
Sample Clock jitter AC-coupled 135 fs RMS DC-coupled 142 fs RMS Integrated from 1 kHz to 10 MHz. Includes the effects of the converter aperture uncertainty and the clock circuitry jitter. Excludes trigger jitter. PXIe-5763 Specifications | © National Instruments | 13... - Page 14 Clock (CLK/REF IN) provided through the CLK/REF IN front panel connector. Default clock configuration. The PLL Reference Clock must be accurate to ±25 ppm. The ADC sample rate is 500 MS/s with a 1 GHz clock. 14 | ni.com | PXIe-5763 Specifications...
- Page 15 Figure 11. AC-Coupled Phase Noise with 182.6 MHz Input Tone, Measured PXIe-5763 Specifications | © National Instruments | 15...
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Page 16: Driver And Application Software
Instrument design libraries allow you to configure and control the device. The instrument design libraries provide programming interfaces, documentation, and sample projects for LabVIEW and LabVIEW FPGA Module. Bus Interface Form factor PCI Express Gen-3 x8 16 | ni.com | PXIe-5763 Specifications... -
Page 17: Maximum Power Requirements
IEC 60068-2-1 and IEC 60068-2-2. Meets MIL-PRF-28800F Class 3 low temperature limit and MIL-PRF-28800F Class 4 high temperature limit.) Relative humidity range 10% to 90%, noncondensing (Tested in accordance with IEC 60068-2-56.) PXIe-5763 Specifications | © National Instruments | 17... -
Page 18: Storage Environment
Identical Modules Synchronization specifications are valid under the following conditions: • All modules are installed in one PXI Express chassis. • The NI-TClk driver is used to align the Sample Clocks of each module. 18 | ni.com | PXIe-5763 Specifications... -
Page 19: Compliance And Certifications
Caused by clock and analog delay differences. No manual adjustment performed. Tested with a PXIe-1085 chassis with a 24 GB backplane with a maximum slot to slot skew of 100 ps. Measured at 23 °C. PXIe-5763 Specifications | © National Instruments | 19... -
Page 20: Ce Compliance
For more information about how to recycle NI products in your region, visit ni.com/environment/weee. 电子信息产品污染控制管理办法（中国 RoHS） National Instruments 符合中国电子信息产品中限制使用某些有害物 中国客户 质指令(RoHS)。关于 National Instruments 中国 RoHS 合规性信息，请登录 。(For information about China RoHS ni.com/environment/rohs_china compliance, go to ni.com/environment/rohs_china 20 | ni.com | PXIe-5763 Specifications... - Page 21 PXIe-5763 Specifications | © National Instruments | 21...
- Page 22 FAR 52.227-14, DFAR 252.227-7014, and DFAR 252.227-7015. © 2018 National Instruments. All rights reserved. 376459A-01 March 6, 2018...