Cpu Clock Source - Digilent chipKIT MX3 Reference Manual

chipKIT™ MX3 Board Reference Manual
One technique that can be used to limit and input voltage to a safe level is to use a 200 ohm series resistor and
Shotkey diode connected to the 3.3V supply to clamp the voltage.
The minimum output high voltage of the PIC32 microcontroller is rated at 2.4V when sourcing 12mA of current.
When driving a high impedance input (typical of CMOS logic) the output high voltage will be close to 3.3V. Some 5V
devices will recognize this voltage as a logic high input, and some won't. Many 5V logic inputs will work reliably
with 3.3V inputs.
If the 3.3V logic output is not sufficient for 5V logic input to be reliably seen as a logic high input signal, some
external means must be used to raise the output level. In some cases, a pull-up resistor to 5V is sufficient. A pull-up
resistor in the range of 2Kohm–10kOhm can be used. This technique should not be used with pins that are not 5V
tolerant on the PIC32 microcontroller.
5

CPU Clock Source

The PIC32 microcontroller supports numerous clock source options for the main processor operating clock. The
chipKIT MX3 uses an 8Mhz external crystal for use with the XT oscillator option. Oscillator options are selected via
the configuration settings specified using the #pragma config statement. Use #pragma config POSCMOD=XT to
select the XT option.
Using the internal system clock phase-locked loop (PLL), it is possible to select numerous multiples or divisions of
the 8Mhz oscillator to produce CPU operating frequencies up to 80Mhz. The clock circuit PLL provides an input
divider, multiplier, and output divider. The external clock frequency (8Mhz) is first divided by the input divider
value selected. This is multiplied by the selected multiplier value and then finally divided by the selected output
divider. The result is the system clock, SYSCLK, frequency. The SYSCLK frequency is used by the CPU, DMA
controller, interrupt controller and pre-fetch cache.
The values controlling the operating frequency are specified using the PIC32MX320 configuration variables. These
are set using the #pragma config statement. Use #pragma config FPLLIDIV to set the input divider,
#pragma config FPLLMUL to set the multiplication factor and #pragma config FPLLODIV to set the
output divider. Refer to the PIC32MX3XX/4XX Family Data Sheet and the PIC32MX Family Reference Manual,
Section 6. Oscillators, for information on how to choose the correct values, as not all combinations of
multiplication and division factors will work.
In addition to configuring the SYSCLK frequency, the peripheral bus clock, PBCLK, frequency is also configurable.
The peripheral bus clock is used for most peripheral devices, and in particular is the clock used by the timers, and
serial controllers (UART, SPI, I2C). The PBLCK frequency is a division of the SYSCLK frequency selected using
#pragma config FPBDIV. The PBCLK divider can be set to divide by 1, 2, 4, or 8.
The following example will set up the chipKIT MX3 for operation with a SYSCLK frequency of 80Mhz and a PBCLK
frequency of 10Mhz:
#pragma config FNOSC = PRIPLL
#pragma config POSCMOD = XT
#pragma config FPLLIDIV = DIV_2
#pragma config FPLLMUL = MUL_20
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