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Digilent PYNQ-Z1 Reference Manual

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PYNQ-Z1 Reference Manual
The PYNQ-Z1 board is designed to be used with PYNQ, a new open-source framework that enables embedded
programmers to exploit the capabilities of Xilinx Zynq All Programmable SoCs (APSoCs) without having to design
programmable logic circuits. Instead the APSoC is programmed using Python, with the code developed and tested directly
on the PYNQ-Z1. The programmable logic circuits are imported as hardware libraries and programmed through their APIs
in essentially the same way that the software libraries are imported and programmed.
The PYNQ-Z1 board is the hardware platform for the PYNQ open-source framework. The software running on the ARM
A9 CPUs includes:
A web server hosting the Jupyter Notebook design environment
The IPython kernel and packages
Linux
Base hardware library and API () for the FPGA
For designers who want to extend the base system by contributing new hardware libraries, Xilinx Vivado WebPACK tools are
available free of cost.
To find out more about PYNQ, please see the project webpage at
materials to help you get started and a forum for contacting the supporting community.
(https://digilent.com/reference/_media/reference/programmable-logic/pynq-z1/pynq-z1-0.png)
https://digilent.com/reference/programmable-logic/pynq-z1/reference-manual?redirect=1
PYNQ-Z1 Reference Manual - Digilent Reference
www.pynq.io
. Here you will find
(http://www.pynq.io)
1/32

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Summary of Contents for Digilent PYNQ-Z1

  • Page 1 PYNQ-Z1. The programmable logic circuits are imported as hardware libraries and programmed through their APIs in essentially the same way that the software libraries are imported and programmed. The PYNQ-Z1 board is the hardware platform for the PYNQ open-source framework. The software running on the ARM A9 CPUs includes:...
  • Page 2 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference https://digilent.com/reference/programmable-logic/pynq-z1/reference-manual?redirect=1 2/32...
  • Page 3 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference Features ZYNQ XC7Z020-1CLG400C 650MHz dual-core Cortex-A9 processor DDR3 memory controller with 8 DMA channels and 4 High Performance AXI3 Slave ports High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO Low-bandwidth peripheral controller: SPI, UART, CAN, I2C...
  • Page 4 15VDC might cause permanent damage. A suitable external power supply is included with the PYNQ-Z1 accessory kit. Similar to using an external power supply, a battery can be used to power the PYNQ-Z1 by attaching it to the shield connector and setting jumper JP5 to “REG”. The positive terminal of the battery must be connected to the pin labeled “VIN”...
  • Page 5 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference 3.3V FPGA I/O, USB ports, Clocks, Ethernet, SD slot, Flash, HDMI 1.6A/0.1A to 1.5A 1.0V FPGA, Ethernet Core 2.6A/0.2A to 2.1A 1.5V DDR3 1.8A/0.1A to 1.2A 1.8V FPGA Auxiliary, Ethernet I/O, USB Controller 1.8A/0.1A to 0.6A...
  • Page 6 Zynq Technical Reference manual  (https://docs.xilinx.com/v/u/en-US/ug585-Zynq-7000- TRM) Table 2.1 depicts the external components connected to the MIO pins of the PYNQ-Z1. The Zynq Presets File found on the PYNQ-Z1 Resource Center can be imported into EDK (https://digilent.com/reference/programmable-logic/pynq-z1/start) and Vivado Designs to properly configure the PS to work with these peripherals.
  • Page 7 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference MIO 500 3.3 V Peripherals ENET 0 SPI Flash USB 0 Shield UART 0 0 (N/C) CS () SCLK () 7 (N/C) SLCK FB Ethernet Reset Ethernet Interrupt USB Over Current...
  • Page 8 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference TXCTL RXCK RXD0 RXD1 RXD2 RXD3 RXCTL DATA4 DATA0 DATA1 DATA2 DATA3 DATA5 DATA6 DATA7 CCLK https://digilent.com/reference/programmable-logic/pynq-z1/reference-manual?redirect=1 8/32...
  • Page 9 Stage 0 After the PYNQ-Z1 is powered on or the Zynq is reset (in software or by pressing SRST), one of the processors (CPU0) begins executing an internal piece of read-only code called the BootROM. If and only if the Zynq was just powered on, the BootROM will first latch the state of the mode pins into the mode register (the mode pins are attached to JP4 on the PYNQ-Z1).
  • Page 10  (http://www.pynq.io) to a microSD card. Once the microSD card has been flashed with the image, the PYNQ-Z1 can be booted with it by following the instructions above starting at step 4. 3.2 Quad SPI Boot Mode The PYNQ-Z1 has an onboard 16MB Quad-SPI Flash that the Zynq can boot from.
  • Page 11 The PYNQ-Z1 is configured to boot in Cascaded JTAG mode, which allows the PS to be accessed via the same JTAG port as the PL. It is also possible to boot the PYNQ-Z1 in Independent JTAG mode by loading a jumper in JP2 and shorting it.
  • Page 12 S25FL128SAGMFI00 < F.0 Table 4.1. PYNQ-Z1 Flash IC Drop-in Replacements The part numbers are highly compatible, however, the W25Q128JV is not functionally equivalent to the previously-loaded parts and might require changes to customer applications (embedded software) depending on the board support package in use (OS (), drivers, and libraries).
  • Page 13 For proper operation it is essential that the PS memory controller is configured properly. Settings range from the actual memory flavor to the board trace delays. For your convenience, the Zynq presets file for the PYNQ-Z1 is provided on the...
  • Page 14 The DTR signal from the UART controller on the FT2232HQ is connected to MIO12 of the Zynq device via JP1. Should the Arduino IDE be ported to work with the PYNQ-Z1, this jumper can be shorted and MIO12 could be used to place the PYNQ-Z1 in a “ready to receive a new sketch”...
  • Page 15 The PYNQ-Z1 is technically an “embedded host”, because it does not provide the required 150 µF of capacitance on VBUS required to qualify as a general purpose host. It is possible to modify the PYNQ-Z1 so that it complies with the general purpose USB host requirements by loading C41 with a 150 µF capacitor.
  • Page 16 USB host controller is enabled and the VBUS power switch (IC9) is turned on. Note that if your design uses the USB Host port (embedded or general purpose), then the PYNQ-Z1 should be powered via a battery or wall adapter capable of providing more power (such as the one included in the PYNQ-Z1 accessory kit).
  • Page 17 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference Figure 9.1. Ethernet PHY signals Ethernet PHY - Revision < F.0 (https://digilent.com/reference/_detail/reference/programmable-logic/pynq-z1/pynq-z1-eth.png?id=programmable-logic%3Apynq- z1%3Areference-manual) Figure 9.1. Ethernet PHY signals After power-up the PHY starts with Auto Negotiation enabled, advertising 10/100/1000 link speeds and full duplex. If there is an Ethernet-capable partner connected, the PHY automatically establishes a link with it, even with the Zynq not configured.
  • Page 18 1.8V, the RGMII interface uses 1.8V HSTL Class 1 drivers. For this I/O standard an external reference of 0.9V is provided in bank 501 (PS_MIO_VREF). Mapping out the correct pins and configuring the interface is handled by the PYNQ-Z1 Z7 Zynq Presets file, available on the Pynq Z1 Resource Center (https://digilent.com/reference/programmable-...
  • Page 19 10 HDMI The PYNQ-Z1 contains two unbuffered HDMI ports: one source port J11 (output), and one sink port J10 (input). Both ports use HDMI type-A receptacles with the data and clock signals terminated and connected directly to the Zynq PL.
  • Page 20 Whenever a sink is ready and wishes to announce its presence, it connects the 5V0 supply pin to the HPD pin. On the PYNQ-Z1, this is done by driving the Hot Plug Assert signal high. Note this should only be done after a DDC channel slave has been implemented in the Zynq PL and is ready to transmit display data.
  • Page 21 11 Clock Sources The PYNQ-Z1 provides a 50 MHz () clock to the Zynq PS_CLK input, which is used to generate the clocks for each of the PS subsystems. The 50 MHz () input allows the processor to operate at a maximum frequency of 650 MHz () and the DDR3 memory controller to operate at a maximum of 525 MHz () (1050 Mbps).
  • Page 22 12.1 Tri-Color LEDs The PYNQ-Z1 board contains two tri-color LEDs. Each tri-color LED () has three input signals that drive the cathodes of three smaller internal LEDs: one red, one blue, and one green. Driving the signal corresponding to one of these colors high will illuminate the internal LED ().
  • Page 23 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference 13.1 Pulse Density Modulation (PDM) PDM data connections are becoming more and more popular in portable audio applications, such as cellphones and tablets. With PDM, two channels can be transmitted with only two wires. The frequency of a PDM signal usually falls in the range of 1 MHz () to 3 MHz ().
  • Page 24 A low level on L/RSEL makes data available on the rising edge of the clock, while a high level corresponds to the falling edge of the clock, as shown in Figure 13.2.1. Note that on the PYNQ-Z1, the L/RSEL signal is permanently tied low, so data is always made available on the rising edge (as seen with the DATA 1 signal in Figure 13.2.1).
  • Page 25 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference (https://digilent.com/reference/_detail/reference/programmable-logic/pynq-z1/pynq-z1-audio-sch.png?id=programmable- logic%3Apynq-z1%3Areference-manual) Figure 14.1. Audio Output Circuit. The Audio shut-down signal (AUD_SD) is used to mute the audio output. It is connected to Zynq PL pin T17. To use the audio output, this signal must be driven to logic high.
  • Page 26 The Zynq PS supports external power-on reset signals. The power-on reset is the master reset of the entire chip. This signal resets every register in the device capable of being reset. The PYNQ-Z1 drives this signal from the PGOOD signal of the TPS65400 power regulator in order to hold the system in reset until all power supplies are valid.
  • Page 27 The PYNQ-Z1 can be connected to standard Arduino and chipKIT shields to add extended functionality. Special care was taken while designing the PYNQ-Z1 to make sure it is compatible with the majority of Arduino and chipKIT shields on the market. The shield connector has 49 pins connected to the Zynq PL for general purpose Digital I/O. Due to the flexibility of FPGAs, it is possible to use these pins for just about anything including digital read/write, SPI connections, UART connections, I2C connections, and PWM.
  • Page 28 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference (https://digilent.com/reference/_media/reference/programmable-logic/pynq-z1/pynq-z1-shield.png) Figure 17.1. Shield Pin Diagram. Pin Name Shield Function PYNQ-Z1 Connection IO0-IO13, IO26- General purpose I/O See Section titled “Shield Digital I/O” IO41, A (IO42) pins I2C Clock See Section titled “Shield Digital I/O”...
  • Page 29 Not Connected Not Connected N / C IOREF Digital I/O Voltage Connected to the PYNQ-Z1 3.3V Power Rail (See the “Power Supplies” reference section) Reset to Shield Connected to the red “SRST” button and MIO pin 12 of the Zynq. When JP1 is shorted, it is also connected to the DTR signal of the FTDI USB- UART bridge.
  • Page 30 3.3V. This circuit is shown in Figure 17.2.1. This circuit allows the XADC module to accurately measure any voltage between 0V and 3.3V (relative to the PYNQ-Z1's GND ()) that is applied to any of these pins. If you wish to use the pins labeled A0- A5 as Digital inputs or outputs, they are also connected directly to the Zynq PL before the resistor divider circuit (also shown in Figure 17.2.1).
  • Page 31 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference (https://digilent.com/reference/_media/reference/programmable-logic/pynq-z1/pynq-z1-shield-diff-an.png) Figure 17.2.2. Differential Analog Inputs. The XADC core within the Zynq is a dual channel 12-bit analog-to-digital converter capable of operating at 1 MSPS. Either channel can be driven by any of the analog inputs connected to the shield pins. The XADC core is controlled and accessed from a user design via the Dynamic Reconfiguration Port (DRP).
  • Page 32 1/30/25, 2:30 PM PYNQ-Z1 Reference Manual - Digilent Reference Digilent 1300 NE Henley Ct. Suite 3 Pullman, WA 99163 United States of America © 2023 Digilent (http://twitter.com/DigilentInc) (http://facebook.com/Digilent) (https://www.youtube.com/user/DigilentInc) (https://github.com/digilent) (https://instagram.com/digilentinc) (https://www.linkedin.com/company/1454013) (https://www.flickr.com/photos/127815101@N07) https://digilent.com/reference/programmable-logic/pynq-z1/reference-manual?redirect=1 32/32...