Simrad HT50 Assembly Instructions Manual page 10

DRAFT
5.2 Control PCB. All the functions of the radio are controlled from this
assembly by the microprocessor IC10. Refer to Drawing No. E03461.
Power Supply. When the ON / OFF key S1 is pressed TR2 is momentarily
turned on which provides power to the voltage regulators. This in turn powers
up the microcontroller circuit which grounds the base of TR1 and holds TR2
ON.
Voltage regulation is provided by two separate 5 volt regulators, REG1 and
REG2 which provide 5 volt supplies to digital and RF circuitry. TR3 and TR4
respectively route the 5 volts to receive and transmit for the RF and other
analogue circuitry.
To turn the radio off switch S1 is again pressed and held for about 2 seconds.
The continued key depression is sensed by the microcontroller and the base of
TR1 goes high causing loss of supply voltage on release of the key.
Microprocessor. The microprocessor has it own clock controlled by XTAL1
running at 4.096MHz. Reset generator IC8 ensures that the microprocessor
starts up correctly, and resets under low voltage conditions. The
microprocessor has an integral LCD interface driving the front panel display,
LCD1. Voltage drive levels for the LCD driver are produced by the resistor
network R65 – R68. External controls consist of 12 push buttons, S1 to S12
and backlighting is provided by 3 LEDs driven by TR11. The level of
illumination is controlled by the duty cycle applied to the base of TR11.
Configuration data and channel information is stored in the non volatile memory
IC5 which interfaces to IC10 via a 4 wire serial interface.
ATIS Generation and Processing. The ATIS signal is generated by the
microprocessor, IC10, which produces a 2 bit (3 level) approximation of a sine
wave at the correct frequency and baud rate. The two outputs are summed by
R21 – R23 before filtering by IC3b which forms a second order low pass filter.
The output is then attenuated by R100 and R25 before summing into the
microphone audio. Note that the microphone is muted by TR10 during
transmission of the ATIS signal. The MMSI is held in the non volatile memory
IC5 together with a control flag to enable ATIS generation.
The microprocessor also includes software code to enable recognition of ATIS
tones to mute the receiver during reception. The received audio is filtered by
IC9c and IC9d followed by a zero crossing detector formed by IC9a, IC9b, D4
and TR12. This signal is fed to the microprocessor which measures the period
of each half cycle of the incoming signal. By counting the number of periods
which might be an ATIS signal the micro can decide that ATIS is being
received. When this decision is made, after about 10ms, the microprocessor
sets an output to mute the audio for 300ms.
Receive Audio. Audio from the demodulator (on RF PCB) is supplied, via VR1
to preset the maximum audio level, to amplifier IC1a and filter IC1b to provide
rejection of frequencies below 300 Hz. The audio is then fed to the audio power
amplifier stage IC2. The supply to IC2 is controlled by the microprocessor
DRAFT 10