Spi Bus - Sierra Wireless AirPrime BX3100 Hardware Integration Manual

Hardware Integration Guide
Table 4-8: GPIO Bootstrap Functions
GPIO Function
0 Boot Source
2 Boot Source
5
SDIO Slave Timing
15 (MTDO)
12 (MTDI) SDIO Interface Voltage Low, Internal pull 45 k
Table 4-9: SDIO Slave Timing Configuration
GPIO(5)
Low
Low
High
High
Rev 3 Sep.18
Default State
High, Internal pull 45 k
High, Internal pull 45 k
High, Internal pull 45 k
High, Internal pull 45 k
GPIO(15)
Low
High
Low
High

4.8 SPI Bus

Note: Interface support is forthcoming.
The AirPrime BX310x provides one 6-wire Serial Flash SPI-compatible interface
(SPI Master).
Note: Traditional 5-wire (MOSI/MISO/SCLK/CS/SRDY) SPI Slave interface can also be
implemented over this same interface.
Table 4-10 describes the SPI interface pins for both configurations (5- and 6-wire).
Note: The pins carrying the SPI interface are multi-function. The alternate interfaces (SDIO or
GPIO) can be selected via an AT command.
Table 4-10: SPI Pin Descriptions
SPI Master
Pin 6-Wire Signal Name
42 HSPICS0
43 HSPIQ
44 HSPICLK
Default Function
Boot from Internal Flash
Rising Edge Input & Output See
3.3V
Configuration
Falling Edge Input & Output
Rising Edge Input, Falling Edge Output
Falling Edge Input, Rising Edge Output
Rising Edge Input & Output
a
SPI Slave
5-Wire Signal Name
CS
MISO
SCLK
20
Alternative
Download to Flash (Disabled)
Table 4-9.
1.8V (Not supported)
b
Direction
Master Slave Function
O I SPI Chip Select
I O MISO
O I SPI Clock
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