Aaeon EMB-830 Manual page 45

E m b e d d e d AT X B o a r d
Configure Control (Index=02h)
This register is write only. Its values are not sticky; that is to
say, a hardware reset will automatically clear the bits, and
does not require the software to clear them.
Bit Description
7-2 Reserved
1 Returns to the Wait for Key state. This bit is used when
the configuration sequence is completed
0 Resets all logical devices and restores configuration
registers to their power-on states.
WatchDog Timer Control Register (Index=71h,
Default=00h)
Bit Description
7 WDT is reset upon a CIR interrupt
6 WDT is reset upon a KBC (mouse) interrupt
5 WDT is reset upon a KBC (keyboard) interrupt
4 WDT is reset upon a read or a write to the Game Port
base address
3-2 Reserved
1 Force Time-out. This bit is self-clearing
0 WDT Status
1: WDT value reaches 0.
0: WDT value is not 0
WatchDog Timer Configuration Register (Index=72h,
Default=00h)
Bit Description
Appendix A Programming the Watchdog Timer A-
E M B - 8 3 0
4