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Model l l l 80A
Section IV
SECTION IV
THEORY OF OPERATION
4-1. DATA OUTPUT.
4-2. Present Mode (Isolated BCD).
4-3. In the non-Storage mode of operation, the Present
Transfer gates receive a pulse on the Present line to transfer
the Data to the outguard storage flip-flops. A pulse is
generated and coupled through the transformers on the
Data bits that are false. The flip-flops are Reset to the true
state by a high pulse and then set to the false state if the
Data bits are false. The "thousands" data is decoded from a
strict binary form into BCD (binary coded decimal)
containing Overrange and Overload information.
4-4. Storage Mode (Memory).
4-5. In the Storage mode of operation, the Memory
Transfer gates receive a pulse on the Memory line and the
Shift Registers receive a pulse on the MOS Oock line to
transfer a stored Data reading to the outguard flip-flops.
4-6. Panel Transfer.
4-7. Front panel readout of the stored Data is accom-
plished by the Panel Transfer gate, which receives the
output of the Memory Transfer gate and operates back
through the same lines that supply the Data to the l l l 80A.
Only the actual digits of the reading are transferred; the
polarity, function and range (decimal point) are not
transferred. Panel Transfer is accomplished on the Output
Cycle.
4-8. IBCD.
4-9. When the 3480 begins a reading, Oock Control signal
goes high to stop the A2 Oock Oscillator by coupling a
pulse through L29 to reset the Oock Gating Flip-Flop and
disable the oscillator at IC36 pin 9.
4-10. A Print Command is generated at the end of the
3480 Sample Period. This is coupled through L30 to turn
on the Clock Oscillator and trigger the Cycle Control
one-shot IC39 to start a basic cycle of the l l l 80A on IBCD
mode.
4-11. A low pulse from IC39 pin 6 gives a high-pulse at
IC35 pin 14 to start the Timing Generator. First, a Reset
pulse is generated at IC36 pin 6 which resets all of the
Outguard Data flip-flops. It is also coupled through L38 to
trigger the MOS Oock one-shot and reset the Data Transfer
flip-flop IC38. Next, a Transfer pulse is generated at IC34
pin 1 and coupled through L35 to "set" the Data Transfer
flip-flop and force the Present line high to transfer the Data
through the Present Transfer gates.
4-12.
The Storage Flag is
controlled
by the Oock Control
signal through L29
,
the Transfer pulse, and the Clock
Oscillator.
4-13. INHIBIT AND PRINTER HOLD.
4-14. The Inhibit line is used to
stop
the 3480 from
sampling when External Trigger
is
used. A low level on the
Inhibit line forces A21C46 pin 8 high, causing Al Ll2 and
Q3 to conduct and give Interface Hold to the
3480.
A high
Printer Hold line causes A2Ql to conduct to make
Interface Hold stop the 3480 from sampling.
4-15. ENCODE (EXTERNAL TRIGGER).
4-16. A low level on the Encode line gives a pulse through
L37 to
generate
a 30 µs External Trigger and
cause
the
3480 to take one measurement.
4-17. BASIC STORAGE.
4-18. To enable operation of the Storage mode, the
Storage Enable line is held low
to
make the Memory line
high.
4-19. During the 3480
sample
period, the Oock Control
line disables the Oock Oscillator as in the IBCD mode. At
the end of the 3480 Sample
Period,
Print Command
generates
a
pulse through L30 to
"set"
the Oock Gating
flip-flop and trigger the Cycle Control one-shot to allow the
Timing Generator to begin a single
cycle.
4-20. A Reset pulse is generated at A2IC36 pin
6
that puts
all of the Data Outguard flip-flops in the true
state.
It is
also coupled through L38 to trigger the MOS Clock
one-shot and shift the Data MOS Shift Registers. It
is
counted by the Units Address Counter.
4-21. Next, a Transfer pulse is generated at A2IC34 pin 1
that is coupled through L36 to give a Memory Data
Transfer at Q8, which transfers the Data from the MOS
Shift Registers to the Data Outguard flip-flops.
4-22. TURN-ON.
4-23. At instrument turn-on, a low level at A2Q2 forces
the I/O Control flip-flop to the Output state, forces the
Jump flip-flop to the Jump
state
to complete the Data
outputting, and sets the Oock Gating flip-flop to the
proper state to allow the Oock Oscillator to complete the
Jump Output cycle so that
it
is ready for an Input cycle.
The Storage Flag is held high by TO signal at CR7 so that
the Printer will not be commanded to print.
4-1
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