Common Mode Rejection - Linear DC951A Demo Manual

Ltc2481 16-bit ae adc with easy drive input current cancellation and i2c interface
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HarDware setup
the board to an existing circuit the exposed ground planes
along the edges of the board may be used to form a solid
connection between grounds.
gnD: Three ground turrets are connected directly to the
internal ground planes.
VCC: This is the supply for the ADC. Do not draw any
power from this point.
rEF+: Connected to the LTC2481 reference pin. If the
onboard reference is being used, the reference voltage
may be monitored from this point. An external reference
may be connected to these terminals if JP1 is removed.
experiments
inPut noiSE
One of the characteristics of the LTC2481 is that the
600nV input noise floor is far below the quantization level
of 38µV when a 5V reference is used and the PGA is set
to a gain of 1. This means that the output will be stable if
the input noise level is significantly below 38µV. In this
sense, the LTC2481 is a true 17 effective bit part, whereas
many 16-bit SAR converters have several LSBs of noise.
Solder a short wire from the IN– turret post to the IN+
turret post. Noise should be below the quantization level
of the LTC2481. This will result in a noise reading of zero
on the control software.
Increase the gain setting to 256 (1× speed mode.) This
results in a 149nV LSB size, allowing a true measurement
of the input noise. Two references are included on DC951A;
an LT1790-5.0 and an LT1236-5. For applications using the
lower gain settings, the LT1790 is adequate. However, in
the highest gain settings the LT1790 can elevate the input
noise by a factor of 2 or 3. The LT1236 is significantly
quieter than the LT1790 and is a good choice for very high
resolution applications. The LT1790 is a good choice for
low power applications or where small size is required.
DEMO MANUAL DC951A
rEF–: Connected to the LTC2481 REF– pin. Normally at
ground when JP4 is set to GND.
in+, in–: These are the differential inputs to the LTC2481.
Ca0/F0: IMPORTANT – Remove JP2 before applying signals
to this turret. An external conversion clock may be applied
to the CA0/F0 turret to modify the frequency rejection
characteristics or data output rate of the LTC2481. This
should be a square wave with a low level equal to ground
and a high level equal to V
can be used, performance may be compromised. Refer
to the LTC2481 data sheet.

CoMMon MoDE rEJECtion

Tie the two inputs (still connected together) to ground
through a short wire and note the indicated voltage. Tie
the inputs to REF+; the difference should be less than
0.5μV due to the 140dB minimum CMRR of the LTC2481.
BiPolar SyMMEtry
To demonstrate the symmetry of the ADCs transfer func-
tion, connect a stable, low noise, floating voltage source
(with a voltage less than V
the indicated voltage. Reverse the polarity; the indicated
voltage will typically be within one LSB of the first reading
multiplied by –1.
One convenient voltage source for this experiment is a
single alkaline battery. While a battery has fairly low noise,
it is sensitive to temperature drift. It is best to use a large
(D-size) battery that is insulated from air currents. A bet-
ter source is a battery powered series reference such as
the LT1790. This part is available with output voltages of
1.25V, 2.048V, 2.5V, 3V, 3.3V, 4.096V and 5V.
. While up to a 2MHz clock
CC
/2) from IN+ to IN– and note
REF
dc951af
3

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