WinSystems EBC-LP Operation Manual page 47

Small, high-performance, embeddable computer system on a single board
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Auto Con figu ra tion
This op tion, when en abled, in structs the BIOS to auto- select the proper DRAM timing, lead Off
timing, DRAM read burst, DRAM write burst tim ing, FAST EDO lead off, Refresh RAS # Assertion,
Fast RAS to CAS Delay, DRAM Page Idle Timer, DRAM Enhanced Paging, Fast MA to RAS# Delay,
SDRAM (CAS Lat/RAS-to-CAS) upon the cal cu lated CPU speed. The de fault is "En abled".
System BIOS Cacheable
This op tion enables or disables cacheability of the system BIOS.
Video BIOS Cacheable
This op tion enables or disables cacheability of the video BIOS.
8 Bit I/O Recovery
Enables and defines 8-bit I/O recovery time in number of clocks.
16 Bit I/O Recovery
Enables and defines 16-bit I/O recovery time in number of clocks.
Memory Hole At 15M-16M
Memory Hole, when enabled, disables onboard memory in the specified range.
PCI 2.1 Compliance
This option, when enabled, makes the EBC-LP PCI 2.1 compliant. The options are:
Enabled
Disabled
CPU Warning Temperature
This option when enabled, allows temperature warning through ACPI capable operating systems.
The available warning temperatures, Celsius and Fahrenheit, are listed below.
50°C / 122°F
53°C / 127°F
56°C / 133°F
60°C / 140°F
66°C / 151°F
70°C / 158°F
Page 3-12
WinSystems - "The Embedded Authority"
EBC-LP OPERATIONS MANUAL
030530

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