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2.17
Watch dog Timer Con figu ra tion
The EBC-LP features a power-on voltage detect and power-down/power brown-out reset circuit to
protect memory and I/O from faulty CPU operation during periods of illegal voltage levels. The
supervisor circuitry also features a watchdog timer which can be used to guard against software
lockups. An internal timer with a period of 1.5 seconds will, when enabled, reset the CPU if the
watchdog has not been serviced within the allotted time.
The watchdog timer powers up disabled and must be enabled in software before timing will begin.
Enabling is accomplished by writing a 1 to I/O port 1EEH. Writing a 0 to I/O port 1EEH will disable the
watchdog. After enabling, petting may be accomplished by writing any value to port 1EFH at least
every 1.5 seconds or a reset will occur. This mode of operation can be used with the BIOS or DOS
provided that the watchdog is disabled before making any extensive BIOS or DOS calls, especially
video or Disk I/O calls which could exceed the 1.5 seconds allowed. The drawback to this mode is that a
lockup dur ing the time the watch dog is dis abled will not al low for auto- recovery and will re quire an
ex ter nal re set.
030530
WinSystems - "The Embedded Authority"
EBC-LP OPERATIONS MANUAL
Page 2-17
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