Block Diagram - Wiener VM-USB User Manual

1.7 Block diagram

I1
O1
ACQ
REG
STACKS
VME command Gen.
VME
FIFOs
Master
USB Controller
OUT FIFO
IN FIFO
WIENER, Plein & Baus GmbH
ACQ REG
External to
FPGA
FPGA
STACKS
Data
Control
- User NIM input
- User NIM "Busy" output
- Data Acquisition Control
- Register Block
- VME Command Stacks (2 kBytes)
- VME command Generator
- VME Bus, Including Arbitration
- Three-Stage Pipelined FIFO array(22 kBytes)
- Control Unit
- FX2 CY7C68013 IC
- USB Out FIFO (Relative to Host)
- USB In FIFO (Relative to Host)
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