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scaler readout triggers operate on "whichever-comes-first" basis, with any trigger
resetting the control counters (event and timer counters).
10 APPENDIX D: ENHANCMENTS IMPLEMENTED IN FIRMWARE 16000503
The following enhancements are implemented in firmware 16000503, as compared with the
earlier versions:
1. A 32-bit multi-block transfer can be performed by the firmware such that a standard
32-bit block transfer is performed repeatedly, for a predetermined number of times,
with the starting address being incremented every time by 0x100 (i.e. 256 bytes). The
number of repetitions is limited to a 32-bit number, i.e., is practically unlimited. To
use this option, bit 11 (value 0x8000) of the Mode Word (containing the AM code
and options bits) must be set and the word itself is to be followed by a 32-bit word
specifying the desired number of (auto-incrementing) repetitions. The length of the
block (bits 24-31 of the Mode Word) is in this case disregarded as it defaults to 64
(i.e., 256 bytes), to provide for a contiguous readout.
2. VME command stack structure has been enhanced so as to allow one to define up to 8
stacks, with Stack ID=0-7, within the allocated memory of 2kBytes = 1kWords. The
starting addresses of stacks can be set arbitrarily. While stacks with ID=2-7 are
dedicated to interrupt handling, stacks with ID=0 and 1 are of dual use. Unless the
latter stacks are used for interrupt handling, they default to a regular stack with ID=0,
executed upon trigger pulse (NIM I1 or USBStart) and the periodic stack with ID=1
(scaler stack). To allow writing to the stacks and reading back their content, the
internal device address space has been expanded to include the additional 2 bits
required to identify the stack (in addition to bit 0). As in earlier versions, the stack ID
is sent to VM-USB in the first word (2 bytes) of the USB out packet, with bit 0 of the
ID mapped to bit 0 of the address word and bits 1 and 2 to bits 4 (value 16) and 5
(value 32) of the address word, respectively. The 9 least significant bits of the second
word of the out packet (disregarded in earlier versions of the firmware) define the
starting address (0 – 1023, with wrap-around) of the particular stack within the
1kWord stack memory space.
3. Interrupt handling is provided, with all 7 IRQs (1 – 7) being monitored, when so
desired. Any Stack ID can be linked to any combination of IRQ and the IRQ-ID
returned by the requestor module, such that one Stack ID can be shared by many
interrupts. Upon detection of a valid interrupt, VM-USB executes the stack linked to
this particular interrupt. The interrupt service vectors are stored in four registers, two
vectors per register. Each vector identifies in its 8 least significant bits the IRQ-ID (to
be received from the requestor upon interrupt acknowledge IACK), in bits 8-10
(starting from bit 0) the IRQ level (1-7), and in bits 12-14 the ID (0-7) of the
associated stack. The vector is disregarded whenever the IRQ-ID is set to zero, e.g.,
allowing one to use Stacks 0 and 1 as regular and periodic (scaler) stacks,
respectively. The vectors are stored at addresses (offsets) 40, 44, 48, and 52 in
arbitrary order.
4. The structure of the event header (specifying the number of words in the event) has
been modified to identify the stack ID associated with this event. The 3-bit stack ID is
stored in bits 13-15 (counting from 0) of the event header word. Unless a mixed-event
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