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GENERAL DESCRIPTION
The VM-USB is an intelligent VME master with high speed USB2 interface. Enhanced
functionality is given by the programmable internal FPGA logic which provides a VME
command sequencer with 4kB stack, 4kB event buffer, and 26kB data buffer. Combined
with the 4 front panel I/O ports, this allows VME operation and data acquisition / buffering
without any PC or USB activity, other than reading out suitably formatted data buffers.
The VM-USB can be also programmed to act as a VME slave with respect to a master crate
controller, while performing master operations on other data acquisition modules. For
example, it can be programmed via the VME bus to perform the readout of multiple VME
modules, with data buffering in a 24-kByte FIFO. The master module can then retrieve the
data from the VM-USB alone, at block transfer rates.
All VM-USB logic is controlled by a XC3S400 XILINX Spartan 3 family FPGA. Upon
power-up the FPGA boots from a selected segment (one of four) of flash memory. The
configuration flash memory can be reprogrammed via the USB port, allowing convenient
updates of the firmware. Following an open platform approach, the user can develop his own
FPGA configuration / firmware. The boot sector is selected by setting of a front-panel rotary
switch.
1.1 VM-USB Features
• Low-cost 6U single wide VME master with high speed USB2 interface, auto-
selecting USB2 / USB1, LED's for speed and FPGA failure/reset..
• While operated as a slot-one system controller, performs round-robin and fair bus
arbitration, generates the 16 MHz system clock, and generates BERR response, when
no DTACK appears within 16us from the assertion of data strobes by any controller.
• May be programmed to service any or all of the 7 interrupt requests IRQ1-7.
• Can generate any of the 7 interrupts when configured with a suitable firmware
• 2 multiplexed NIM inputs (with LEMO connectors), with a selection of input signal
functionality including 2 32-bit scalers and 2 delay and gate generators.
• 2 multiplexed NIM outputs (with LEMO connectors), with a selection of source
signals, including the outputs of the 2 delay and gate generators.
• 4 multiplexed LED's, with a large selection of diagnostic signals.
• Spartan 3 FPGA, XC3S400 based, firmware upgradeable via the USB port from a
host PC.
• Built in VME sequencer, 1k x 16 bit VME command stack memory for use in an
autonomous data acquisition process. Programmable via USB and/or VME,
depending on the active FPGA firmware.
• Open architecture, allowing the user to develop his own FPGA configuration.
• Readout triggered either via USB link, by VME interrupt (IRQ1-7) or by a start signal
applied to a (programmable) NIM input.
• 26-kByte of pipelined data buffer (FIFO) with programmable level of transfer trigger
• Low power consumption, only +5V used.
WIENER, Plein & Baus GmbH
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www.wiener-d.com
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