Marantz SA8004/K1SG Service Manual page 70

R5F212CCSNFP Block diagram
I/O ports
Peripheral functions
Timers
Timer RA (8 bits
Timer RB (8 bits
Timer RC (16 bits
Timer RD (16 bits 2)
Timer RE (8 bits 1)
Timer RF (16 bits
Watchdog timer
(15 bits)
A/D converter
(10 bits 20 channels)
D/A converter
(8 bits
CS4398 Terminal Functions
PIN PORT NAME
1 P3_3 CP_READY
2 P3_4 SDA
3 P5_7 -
4 P5_6 -
5 P5_5 -
6 MODE MODE
7 P4_3 IPOD_RESET
8 P4_4 SACD_DIR
9 RESET RESET
10 XOUT CLOCK
11 VSS VSS
12 XIN CLOCK
13 VCC VCC
14 TRCIOD TRY_OPN
8 8
Port P0 Port P1
UART or
clock synchronous serial I/O
(8 bits
1)
2
1) I C bus or SSU
(8 bits
1)
1)
LIN module
R8C/Tiny Series CPU core
2)
R0H R0L
R1H R1L
R2
R3
A0
A1
FB
I/O
NOR
STBY
MAL
I I
I/O I
I I
I I
I I
I I
O I
O I
I I
- -
- -
- -
- -
O I
8 8
Port P2 Port P3
System clock generation
3)
High-speed on-chip oscillator
Low-speed on-chip oscillator
1)
SB
USP
ISP
INTB
PC
FLG
NOTES:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
INITIAL
- IPOD READY
H IIC DATA
L -
L -
- -
- -
L IPOD ATTESTATION IC RESET OUTPUT
L SIGNAL CHANGE OUTPUT POWER OF SACD AND DIR
- -
- 20MHz
- GND
- 20MHz
- 3.3V
L TRAY OPEN OUTPUT PWM OUTPUT
70
3 2
8
Port P4 Port P5
circuit
XIN-XOUT
XCIN-XCOUT
Memory
(1)
ROM
(2)
RAM
Multiplier
FUNCTION