Marantz SA8004/K1SG Service Manual page 68

CS4398 (MAIN : U204)
CS4398 Terminal Functions
Pin Name Pin #
DSD_A 28
DSD_B 1
DSD_SCLK 2
SDIN 3
SCLK 4
LRCK 5
MCLK 6
VD 7
DGND 8
RST 13
VLC 14
FILT+ 15
REF_GND 16
VREF 17
BMUTEC 18
AMUTEC 25
AOUTB+ 20
AOUTB- 19
AGND 21
VA 22
AOUTA+ 23
AOUTA- 24
VQ 26
VLS 27
Stand-Alone Mode Definitions
M3 9
M2 10
M1 11
M0 12
Control Port Mode Definitions
AD1/CDIN 9
SCL/CCLK 10
SDA/CDOUT 11
AD0/CS 12
DSD_B
DSD_SCLK
SDIN
SCLK
LRCK
MCLK
VD
DGND
M3 (AD1/CDIN)
M2 (SCL/CCLK)
M1 (SDA/CDOUT)
M0 (AD0/CS)
RST
VLC
Direct Stream Digital Input (Input) - Input for Direct Stream Digital serial audio data.
DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital audio interface.
Serial Audio Data Input (Input) - Input for two's complement serial audio data.
Serial Clock (Input) - Serial clock for the serial audio interface.
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on
the serial audio data line.
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
Digital Power (Input) - Positive power for the digital section.
Digital Ground (Input) - Ground reference for the digital section.
Reset (Input) - The device enters system reset when enabled.
Control Port Power (Input) - Positive power for Control Port I/O.
Positive Voltage Reference (Output) - Positive reference voltage for the internal sam-
pling circuits.
Reference Ground (Input) - Ground reference for the internal sampling circuits.
Voltage Reference (Input) - Positive voltage reference for the internal sampling circuits.
Mute Control (Output) - The Mute Control pin is active during power-up initialization, mut-
ing, power-down or if the master clock to left/right clock frequency ratio is incorrect. During
reset, these outputs are set to a high impedance.
Differential Right Channel Analog Output (Output) - The full-scale differential analog
output level is specified in the Analog Characteristics specification table.
Analog Ground (Input) - Ground reference for the analog section.
Analog Power (Input) - Positive power for the analog section.
Differential Left Channel Analog Output (Output) - The full-scale differential analog out-
put level is specified in the Analog Characteristics specification table.
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
Serial Audio Interface Power (Input) - Positive power for serial audio interface I/O.
Mode Selection (Input) - Determines the operational mode of the device.
Address Bit 1 (I²C) / Control Data Input (SPI) (Input) - AD1 is a chip address pin in I²C
mode; CDIN is the input data line for the Control Port interface in SPI mode.
Serial Control Port Clock (Input) - Serial clock for the serial Control Port.
Serial Control Data (I²C) / Control Data Output (SPI) (Input/Output) - SDA is a data I/O
line in I²C mode. CDOUT is the output data line for the Control Port interface in SPI mode.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin
in I²C mode; CS is the chip select signal for SPI format.
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
Pin Description
68
DSD_A
VLS
VQ
AMUTEC
AOUTA-
AOUTA+
VA
AGND
AOUTB+
AOUTB-
BMUTEC
VREF
REF_GND
FILT+