Marantz SA8004/K1SG Service Manual page 66

LC89057W-VF4 Terminal Functions
Pin No. Name
1 RXOUT
2 RX0
3 RX1
4 RX2
5 RX3
6 DGND
7 DV DD
8 RX4
9 RX5/VI
10 RX6/UI
11 DV DD
12 DGND
13 LPF
14 AV DD
15 AGND
16 RMCK
17 RBCK
18 DGND
19 DV DD
20 RLRCK
21 RDATA
22 SBCK
23 SLRCK
24 SDIN
25 DGND
26 DV DD
27 XMCK
28 XOUT
29 XIN
30 DV DD
31 DGND
32 EMPHA/UO
______
33 AUDIO/VO
_____
34 CKST
___
35 INT
36 RERR
37 DO
38 DI
39 CE
40 CL
41 XMODE
42 DGND
43 DV DD
44 TMCK/PIO0
45 TMCK/PIO1
46 TLRCK/PIO2
47 TLRCK/PIO3
48 TXO/PIOEN
1) Withstand voltage input/output: I or O = −0.3 to 3.6V, I 5 = −0.3 to 5.5V
2) Pins 32 and 33 are input pins for chip address setting, when pin 41 = "L".
3) Pin 34 is a demodulation function master or an input pin for slave setting, when pin 41 = "L".
4) Pin 35 is a modulation function or an input pin for general-purpose I/O function switch setting, when pin 41 = "L".
5) ON/OFF for all power supplies must be done at the same timing as a latch-up countermeasure.
I/O
O
Output pin of Input bi-phase selection data
I 5
Input pin of TTL-compatible digital data
I
Digital data input pin with built-in amplifier that supports coaxial
I 5
Input pin of TTL-compatible digital data
I 5
Input pin of TTL-compatible digital data
Digital GND
Digital power supply
I 5
Input pin of TTL-compatible digital data
I 5 TTL-compatible digital data || Validity flag input pin for modulation
I 5
TTL-compatible digital data || User data input pin for modulation
Digital power supply for PLL
Digital GND for PLL
O PLL loop filter connection pin
Analog power supply for PLL
Analog GND for PLL
O R system clock output pin (256fs, 512fs, XIN, VCO)
O/I R bit clock input/output pin (64fs)
Digital GND
Digital power supply
O/I R LR clock input/output pin (fs)
O Output pin of serial audio data
O S bit clock output pin (32fs, 64fs, 128fs)
O S LR clock output pin (fs/2, fs, 2fs)
I 5 Input pin of serial audio data
Digital GND
Digital power supply
O Oscillation amplifier output pin
O Quartz resonator connection output pin
I Quartz resonator connection, input pin of external supply clock (24.576 MHz or 12.288 MHz)
Digital power supply
Digital GND
I/O Emphasis information || U data output || Chip address setting pin
I/O Non-PCM detection || V flag output || Chip address setting pin
I/O Output of clock switch transitional period signal || Demodulation master or slave function switch pin
Interrupt output for Microcontroller (Possible to select an interrupt factor.) || Modulation or general-purpose
I/O
I/O switch pin
O PLL clock error, data error flag output
O Microcontroller I/F, read data output pin (3-state)
I 5 Microcontroller I/F, write data input pin
I 5 Microcontroller I/F, chip enable input pin
I 5 Microcontroller I/F, clock input pin
I 5 System reset input pin
Digital GND
Digital power supply
I/O 256fs system clock input for modulation || General-purpose I/O input/output pin
I/O 64fs bit clock input for modulation || General-purpose I/O input/output pin
I/O fs clock input for modulation || General-purpose I/O input/output pin
I/O serial audio data input for modulation || General-purpose I/O input/output pin
O/I Modulation data output || General-purpose I/O enable input pin
Function
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