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DIGITAL-LOGIC AG
4.5.3
ROM-BIOS Sockets
An EPROM socket with 8 Bit wide data access normally contains the board's AT compatible ROM-BIOS. The
socket takes a E82802AC8 EPROM (or equivalent) device. The board's wait-state control logic automatically
inserts four memory wait states in all CPU accesses to this socket. The ROM-BIOS sockets occupies the
memory area from C0000H through FFFFFh; however, the board's ASIC logic reserves the entire area from
C0000h through FFFFFh for onboard devices, so that this area is already usable for ROM-DOS and BIOS
expansion modules. Consult the appropriate address map for the MICROSPACE MSEP800 ROM-BIOS
sockets.
4.5.3.1
Standard BIOS ROM
DEVICE:
MAP:
4.5.4
BIOS CMOS Setup
If wrong setups are memorized in the CMOS-RAM, the default values will be loaded after resetting the
RTC/CMOS-RAM by desoldering the batterie.
If the battery is down, it is always possible to start the system with the default values from the BIOS.
FWH
E0000 - FFFFFh
C0000 – C7FFFh
CC000 - CFFFFh
Core BIOS 128k
VGA BIOS 32k
FREE
41
MSEP800 Manual V1.0G
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