Tait TB9100 Service Manual
  1. Manuals
  2. Brands
  3. Tait Manuals
  4. Accessories
  5. TB9100
  6. Service manual

Tait TB9100 Service Manual

Reciter
Hide thumbs Also See for TB9100:
Table of Contents

Advertisement

Quick Links

See also: Operating Manual , User Manual
TB9100 base station
Reciter Service Manual
MBA-00017-01
Issue 1
January 2006

Advertisement

Table of Contents
loading

Related Manuals for Tait TB9100

Summary of Contents for Tait TB9100

  • Page 1 TB9100 base station Reciter Service Manual MBA-00017-01 Issue 1 January 2006...
  • Page 2 Website: http://www.taitworld.com To our European customers: Tait Electronics Limited is an environmentally responsible company which supports waste minimization and material recovery. The European Union’s Waste Electrical and Electronic Equipment Directive requires that this product be disposed of separately from the general waste stream when its service life is over.

  • Page 3: Table Of Contents

    5.4 DSP ............65 TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 4 8.5 Appendix E – Component Locations....... . 128 TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 5: Preface

    Preface Scope of Manual Welcome to the TB9100 Reciter Service Manual. This manual provides servicing information for the TB9100 reciter. All other TB9100 base station servicing information is the same as the information provided in the TB8100 Service Manual. Enquiries and Comments...

  • Page 6: Terminology

    Associated Documentation TB8100 Service Manual. TB9100 Specifications Manual. TB9100 Installation and Operation Manual. TB9100 Customer Service Software User’s Manuals and online Help. TB9100 Calibration Kit User’s Manual and online Help. TB9100 Network Installation Guide. TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 7: Publication Record

    Little Endian 1. Technical notes are only available in PDF format from the Tait support website. Consult your nearest Tait Dealer or Customer Service Organiza- tion for more information.
  • Page 8 Usually not byte-erasable. Host Port Interface, an interface between a DSP and its host processor GPCM General-purpose Chip-select Machine, a basic user programmable memory controller General purpose register TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 9 MPC859TPZ133 PowerQUICC microprocessor Non-maskable interrupt One Time Programmable, a non-volatile memory device that cannot be erased and reprogrammed after initial programming Most significant bit PBGA Plastic BGA Pulse Code Modulation TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 10 Synchronous Dynamic Random Access Memory System Interface Synchronous Input/Output, a simplified version of SPI System Interface Unit Serial Management Controller Serial Management Interface, an interface for management and control of ethernet PHYs TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 11 Neumann architecture A type of computer architecture that combines executable code and data into the same memory space. cf. Harvard architecture. TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 12 TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 13: Replacing The Network Board

    Tx LED 1PPS coaxial cable Equipment Required Anti-static work environment PC with Ethernet cable. Torque screwdriver (4.5in-lbs) with Torx T-10 bit TB9100 subrack (PA not required) TB9100 Reciter Service Manual Replacing the Network Board © Tait Electronics Limited January 2006...

  • Page 14: Troubleshooting

    Select the following port settings: 57600 baud, 8 bits, no parity, 1 stop bit, no flow control. d. Press the ‘Enter’ key. If a login prompt appears, the kernel is run- ning. If the bootloader prompt (=>) appears, contact Tait for Replacing the Network Board TB9100 Reciter Service Manual...

  • Page 15: Before You Start

    IP address and netmask. Attempt to access the bootloader prompt. If this is unsuccessful, the bootloader is faulty. The reciter will need to be returned to Tait Electronics Limited for the bootloader to be repaired. If the network board fails some or all of the above tests, replace it as described below.

  • Page 16: Removing The Faulty Board

    Position the replacement network board over the locating pins and press it down over them so that it is firmly seated against the insulator sheet on the heatsink. Replacing the Network Board TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 17 Replace the rear panel and the reciter cover. Tighten the Torx screws to the correct torque. Inadequately tight screws can affect the EMC properties of the board. Return the faulty board to Tait. TB9100 Reciter Service Manual Replacing the Network Board...

  • Page 18: Restoring The Configuration

    Reset the reciter. On power-up, the reciter uses the new IP address. Use the procedures in the Troubleshooting section above to verify correct operation of the network board. Replacing the Network Board TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 19: Reciter Circuit Descriptions

    RF and control signals. The locations of the main circuit blocks on the PCBs are shown in Figure 5.1 on page TB9100 Reciter Service Manual Reciter Circuit Descriptions © Tait Electronics Limited January 2006...
  • Page 20 Synthesizer RISC Subsystem Control & Modulation Communications RF O/P + & Frequency PA Key Control Audio Exciter CODEC RF Board Digital Board System Control Bus System I/O Reciter Circuit Descriptions TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 21: Digital Circuitry

    The digital output therefore contains information in the form of images, which can be digitally processed to extract one of the many signals. The lowest frequency image for the 70.1MHz IF and 40MHz clock is at 9.9MHz. TB9100 Reciter Service Manual Digital Circuitry © Tait Electronics Limited January 2006...

  • Page 22: Digital Signal Processor (Dsp)

    CTCSS and DCS signalling audio filtering: including removal of sub-audible components, de- emphasis and low pass filtering signal path switching signal level adjustment FM demodulation of the base band signal Digital Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 23 The CODEC outputs are as follows: VCO voltage control line VCXO voltage control line balanced line output unbalanced line output speaker output RSSI voltage indicator. TB9100 Reciter Service Manual Digital Circuitry © Tait Electronics Limited January 2006...
  • Page 24 Figure 3.1 Reciter Digital Circuitry Block Diagram Digital Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 25: Reduced Instruction Set Computer (Risc)

    (SPI) for programming the synthesizers SPI for communication with the network PCB C for communication with the control panel and other modules in the subrack. TB9100 Reciter Service Manual Digital Circuitry © Tait Electronics Limited January 2006...
  • Page 26 The RISC communicates with the DSP’s shared memory via a host port interface. It loads the DSP code and monitors and controls the following DSP operations: receive path transmit path crosspoint switches power supplies PA Key output. Digital Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 27: 40Mhz Digital Clock

    The 40MHz frequency synthesizer is implemented using an Integer_N- based phase locked loop (PLL) IC. The PLL is a negative feedback loop, TB9100 Reciter Service Manual Digital Circuitry © Tait Electronics Limited January 2006...
  • Page 28 12.8MHz reference. The 40MHz VCXO oscillator is electrically tuned using two varactors. The oscillator output is buffered before being distributed to the digital circuitry. Digital Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 29: Reference Switch

    The VCXO is implemented by using a varactor to linearly tune a 12.8MHz crystal unit over a specified frequency range. The frequency range provided will cover frequency drifts due to calibration, the temperature tolerance of TB9100 Reciter Service Manual Reference Switch © Tait Electronics Limited January 2006...

  • Page 30: Reference Switch

    A complementary emitter follower, using NPN/PNP dual transistors, forms two clock buffer branches which distribute the internal or external references to the rest of the system. The branches provide a reasonable drive level at low impedance. Reference Switch TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 31 Figure 4.1 Reciter External Reference Block Diagram TB9100 Reciter Service Manual Reference Switch © Tait Electronics Limited January 2006...
  • Page 32 Reference Switch TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 33: Network Circuitry

    “Audio and E&M Interface” on page is jointly controlled by the RISC processor and the DSP. The E&M signalling is connected to the RISC processor. Audio data to/from the DSP TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 34 Micro-match connector J100 is used as the debug and program loading port for the RISC processor Micro-match connector J106 provides a JTAG interface to the DSP for software debug purposes Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 35 DSP code. It cannot be fitted to production boards as it is placed on the underside of the ASIF PCB; it is not possible to fit boards equipped with J106 on to the reciter heatsink. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 36 2& analog line audio CODEC analog line isolating transformers 1 PPS sync analog line RJ45 connector Ethernet RJ45 connector serial & digital I/O (DB9) connector Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 37 2& 1& TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...

  • Page 38: Risc Processor

    10/100 32-Bit RISC Controller Generators Base-T and Program Independent Media Access Parallel Interface Control Timers Port and UTOPIA Channels Ethernet SCC1 SMC1 SMC2 Time Slot Assigner Serial Interface Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 39 PowerPC and to external memory and peripherals. The performance is further enhanced by pipelining instruction fetching and execution. Instructions are pre-fetched from memory and pre-decoded to TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 40 RISC core into a real address used to access external memory and peripherals. Separate instruction and data memory managers support the Harvard architecture of the CPU but their Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 41 These serial interface pins are brought out to connector J100 along with the reset signals (HRESET, SRESET) and the CPU status pins (VFLS0, VFLS1). TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 42 The PowerPC architecture includes several supplementary timer functions Time Bases and Watchdog to provide hardware and software monitoring and operating system support: Bus monitor Software watchdog timer Periodic Interrupt Timer Time base counter Decrementer Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 43 Interrupts from internal sources are combined and prioritized along with external interrupts (see “Interrupt Controller” on page 55). TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 44 (see “Power-on Reset” on page 85). In response, the MPC drives its hard reset (HRESET) and soft reset (SRESET) outputs low, resetting any external circuitry connected to them. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 45 HRESET is asserted. Four tri-state buffers, U200, U205, U210 and U211, drive selected data bus lines high while HRESET is active, giving the configuration settings shown in Table 5.4. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 46 MPC D30 is connected to D1, and so on. The MPC’s external data bus is 32 bits wide. Normally, the MPC attempts to transfer data as 32-bit words, however, it can transfer data to/from 8-bit Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 47 The resistors reduce the signal rise time slightly and absorb any signals reflected back from the memory device pins. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 48 (see “Memory Controllers” on page 49). The sequence of operations for a single (ie. non-burst) bus write cycle is shown in Figure 5.4. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 49 (reference 2) should be consulted for full details. Between them, these controllers can generate the necessary control signals to interface with parallel bus devices such as: TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 50 GPCM is assigned to handle the CS0, CS2 and CS3 chip select lines. The GPCM also controls the write enable (WE0) and read enable (OE) strobes to the flash EPROM and DSP. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 51 RAM; the RAM is subdivided into sections corresponding to the different types of memory requests: single word read cycle request TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 52 Sense Multiple Access with Collision Detection, CSMA/CD) operation is outside the scope of this document. For those unfa- miliar with ethernet principles, it is recommended that a standard text (reference 21) be consulted. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 53 RISC CPU. A block diagram of the CPM is shown in Figure 5.5. Reference should be made to Part V of the MPC866 user’s manual (reference 2) for a detailed description of the CPM’s capabilities. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 54 PHY. This clock is divided down from the MPC’s system clock. When connected to an external signal, the timers can count events or mark the occurrence of edges on those pins. One timer input, TIN3, connects to Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 55 ASIF because the reciter does not support them. 1. This signal is named as per the reciter signal naming convention, hence the apparent contradiction in the signal name vs signal direction. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 56 “Time-Division Multiplexed (TDM) Port and Time Slot Assigner (TSA)” on page 57), which routes the bit clocks and word synchronization signals from the serial PCM stream produced by the reciter DSP. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 57 The reciter RISC is the server device, so the MPC’s SPI is configured as a client device. The MPC’s SPI effectively emulates the SIO I/O expansion circuitry present on the analog SIF. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 58 The MPC is assigned as the server device and drives the clock line, SCL. This clock determines the bit rate of the data transfers, which occur bi- directionally over the data line, SDA. The beginning and end of a message Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 59 ASIF not ready “Board Status Signal” on page 85 PA13 DSP reset “Interrupts and Reset” on page 67 PB14 none PB15 Ethernet PHY “Ethernet PHY Configuration” on page 75 power-down TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 60 “General-purpose Digital Inputs” on page 72 digital input 0 IPA1 General purpose “General-purpose Digital Inputs” on page 72 digital input 1 IPA2 General purpose “General-purpose Digital Inputs” on page 72 digital input 2 Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 61: Memory

    The addition of wait states and other signal timing requirements are implemented by the GPCM (see “General-Purpose Chip Select Machine” on page 50). TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 62 The CLK signal is generated by the MPC. For EMC reduction the clock line is series terminated by resistor R204. An AC-coupled shunt termination, R303 and C317, cleans up residual reflections on the clock line. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 63 Then, at least 8 refresh cycles (see “SDRAM Refresh Cycles” on page 64) must be executed. Finally, the mode register set command is issued to set the following parameters: TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 64 Although all rows could be refreshed in one block every 64ms, to do so would prevent the MPC from accessing its memory for an extended period. It is preferable to perform refreshes on a distributed basis, ie. one row every Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 65: Dsp

    DSP capable of operating at up to 160 MIPs. Refer to the TMS320VC5510 data sheet (reference 7) and functional overview (reference 8) for details of the DSP characteristics. Figure 5.7 shows the internal architecture of the DSP. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 66 (EMIF) controller. For external accesses, both program and data accesses occur over a unified 32 bit data bus and 22 bit address bus, ie. a von Neumann type architecture. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 67 (CLKIN) can be multiplied by various ratios ranging from 0.25 to 31 with the proviso that the final PLL operating frequency must lie in the range 80MHz to 160MHz. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 68 By default, the DSP starts executing from the boot loader ROM when its reset is released. One of the first operations of this boot loader program is to Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 69 1Megaword of the DSP memory space except for the DSP’s peripheral and control registers. Hence, the MPC accessible memory includes all of the DARAM and SARAM, plus a portion of the external DSP memory, if fitted. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 70 HCS has been negated. Note U204, U212 and U213 are omitted from current network boards. The MPC performs a wait following each write cycle to DSP memory. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 71: I/O Buffers

    PCs. The interface is configured as DCE mode and connection is made through a rear panel DB9 socket, which is pin-out compatible with IBM PC serial cables. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 72 +5V, excess current will flow through resistor R630 and diode D605; Zener diode D610 diverts this excess current to ground, maintaining the efficacy of the protection clamp. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 73 RSSI+ and RSSI- by approximately 1.64. They also compensate for the 2.4V standing bias levels on the RSSI+ and RSSI- lines. The output of U601 is protected by resistors R601 and R631, TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...

  • Page 74: Ethernet Interface

    LED3 output indicates whether a collision has occurred during transmission. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 75 One further hardware pin, PDOWN, is used to put the PHY into a low- power standby mode when taken low. This pin is driven by a general- purpose output, PB15, from the MPC. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 76 Should one occur, the Collision (COL) output is set high, indicating to the FEC that it has to retry the transmission later. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 77: Audio And E&M Interface

    This switch routes the output signal to an output power amplifier, and subsequently to balanced outputs, EAR1OP and EAR1ON. The unbalanced output, EAR2O, is not used in the ASIF design. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 78 The level of protection provided by the transient suppressors and clamping diodes is regarded as “secondary” protection only: if extreme conditions are expected, “primary” overvoltage protection devices, such as arrestors, may need to be fitted externally. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 79 E-lead must now be wired externally to the ASIF. Any voltage source from 5 to 50V is suitable, but it will have to be suitably isolated from TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 80 Q500 and D500b with PNP transistor Q504b acting to control the current flow. The E-lead incorporates protection and EMC filtering as for the M-lead. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 81: Clock Oscillator

    The lower ripple current injects less noise back into the input supply, hence input filtering requirements are less onerous. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 82 This is accomplished by grounding the PLL filter pin; U900 has an internal PLL to synchronize its operating frequency to an external source, but this mode of operation is not used in this design. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 83 The MOSFETs are operated in this mode because, in normal connection, the inherent substrate diode TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 84 +3.3V rail by more than a diode drop. They also limit the maximum differences between the +3.3V supply and +1.6V and +1.8V supplies to approximately 2.4V and 1.8V, respectively. Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 85 A +3.3V supply line is available from the reciter on pin 7 of connector J101: if this supply is not present, the ASIF_RDY line is pulled low through diode D100. TB9100 Reciter Service Manual Network Circuitry © Tait Electronics Limited January 2006...
  • Page 86 Network Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 87: Rf Circuitry

    The post-mixer buffer amplifier provides gain and isolation between the mixer and crystal filter. It also compensates for the insertion loss of the crystal filter. TB9100 Reciter Service Manual RF Circuitry © Tait Electronics Limited January 2006...
  • Page 88 (part of the synthesizer IC), which compares both divider references and delivers an error signal. A ±4mA charge pump circuit (also part of the synthesizer IC) and the active loop filter circuit convert this error RF Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 89 16.9MHz above (high side injection) to produce the 16.9MHz IF signal at the output of the mixer. 1. The normal lock range is between 3V and 16V. TB9100 Reciter Service Manual RF Circuitry © Tait Electronics Limited January 2006...
  • Page 90 Figure 6.2 Reciter Receiver Synthesizer Block Diagram RF Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 91: Receiver Rf Circuitry - Uhf Reciter

    50Ω, thus ensuring a good match for all mixing products, as well as enhancing the linearity. The post-mixer buffer amplifier compensates for the insertion loss of the crystal filter, and any excess gain is reduced by the following attenuator pad. TB9100 Reciter Service Manual RF Circuitry © Tait Electronics Limited January 2006...
  • Page 92 IC) and the active loop filter circuit convert this error signal to a DC voltage (0 to 22V ) to tune the VCO for correction. 1. The normal lock range is between 3V and 16V. RF Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 93 AGC is the output of the post-mixer buffer. The input signal to the AGC is buffered, amplified and then detected. The detected DC voltage is buffered and fed to PIN_CTRL to control the attenuation of the PIN attenuator. TB9100 Reciter Service Manual RF Circuitry © Tait Electronics Limited January 2006...

  • Page 94: Exciter Rf Circuitry

    The VCXO and TCXO signals are phase shifted and multiplied by XOR Twisted Ring Counter (exclusive_or) logic. This is achieved using a twisted ring counter, which also divides both signals by four. RF Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 95 FCL_VCXO and the VCO. The DAC has a signal-to-noise ratio of 70dB. 6.3.2 Synthesizer The exciter synthesizer consists of a programmable frequency synthesizer IC, the exciter VCO, and a modulatable frequency reference. TB9100 Reciter Service Manual RF Circuitry © Tait Electronics Limited January 2006...
  • Page 96 The VCO feedback attenuator is a resistive divider that terminates the VCO feedback signal in a fixed low impedance (50Ω). This attenuates the VCO RF level down to a level suitable for the RF prescaler (within the synthesizer IC). RF Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 97 Figure 6.5 Reciter Exciter Synthesizer Modulator Block Diagram - B and H Bands TB9100 Reciter Service Manual RF Circuitry © Tait Electronics Limited January 2006...
  • Page 98 Mechanical tuning is possible by adjusting the trimmer. Changes in the control voltage from the loop filter are applied to the varactors to facilitate electronic tuning. 1. The normal lock range is between 3V and 16V. RF Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 99 RF power to drive the following stages. The VCO has a high second harmonic content. A third order low pass Harmonic Filter elliptic filter is used to attenuate this content. TB9100 Reciter Service Manual RF Circuitry © Tait Electronics Limited January 2006...
  • Page 100 The exciter control circuit uses Ex_Key to power up or shut down the VCO final driver, and PA_Key to power up or shut down the PA driver. RF Circuitry TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 101: Power Supply

    +2.5V regulator for the DSP. These are switched as part of the power saving modes. The +3.3V output is also supplied to the network PCB via a protection circuit. TB9100 Reciter Service Manual Power Supply © Tait Electronics Limited January 2006...
  • Page 102 Power Comparators Regulator Switch +28V PWR_GOOD PWD_ON Analog 3.3V Power PWD_RX Switch Lock-out Circuit* DSP Low 2.5V Regulator 2.5V 3.3V to ASIF *To prevent DSP latch-up Protection Circuit Power Supply TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 103: Appendices

    Appendices Appendix A – I C Device Addresses Table 8.1 C Device Addresses Device C Address Range U202, 24C16 E2PROM 0xA0 - 0xAF U500, TLV320AIC1103 CODEC 0xE2 - 0xE3 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...

  • Page 104: Appendix B - Asif Connectors

    Signal Name Direction Function +28V Main power input Not used Not used SIF_3V3 Power sense/power supply from reciter PWR_ON Reciter power status PWR_RX Receiver power status PWR_EX Exciter power status Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 105 Serial expansion interface receive data SIO_CON Serial expansion interface control/select 25 to 28 Not used 30 to 37 Not used RSSI+ Analog RSSI input RSSI- Analog RSSI input Not used TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 106 DSP receive data DSP_TCLD2 DSP receive clock DSP_TFS2 DSP receive frame sync DSP_DR2 DSP transmit data DSP_RCLK2 DSP transmit clock DSP_RSF2 DSP transmit frame sync DSP_SIF_INT 1 PPS interrupt Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 107 J104 Ethernet Connector Table 8.6 Ethernet Connector Pinout Pin Number Signal Name Direction Function Transmit signal Transmit signal Receive signal Not used Not used Receive signal Not used Not used TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 108 Test mode reset Test data input 5 to 6 Not used Test data output TCK_RETURN Test clock output Test clock input EMU0 Emulation mode select Not used EMU1 Emulation mode select Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 109: Appendix C - Test Points

    General-purpose DSP software flag TP402 General-purpose DSP software flag TP403 General-purpose DSP output flag - TP404 General-purpose DSP software flag TP405 General-purpose DSP software flag TP406 DSP serial port transmit data - TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 110 DSP serial port receive clock - TP411 DSP serial port receive data - TP412 DSP clock output TP413 DSP host port ready output - HRDY TP900 Ground TP910 Ground Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 111: Appendix D - Processor Port Assignments

    Address bus 16 A[17] Address bus 17 A[18] Address bus 18 A[19] Address bus 19 A[20] Address bus 20 A[21] Address bus 21 A[22] Address bus 22 A[23] Address bus 23 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 112 SPI output data in server mode; SPI input data in client mode PB28 General-purpose I/O port B, bit 28 BS_A0 Byte Select 0 on UPMA BS_A1 Byte Select 1 on UPMA BS_A2 Byte Select 2 on UPMA Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 113 Data Bus 8 D[9] Data Bus 9 D[10] Data Bus 10 D[11] Data Bus 11 D[12] Data Bus 12 D[13] Data Bus 13 D[14] Data Bus 14 D[15] Data Bus 15 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 114 GPLA1 General-purpose Line 1 on UPMA Output Enable GPLB1 General-purpose Line 1 on UPMB GPLA2 General-purpose Line 2 on UPMA GPLB2 General-purpose Line 2 on UPMB Chip Select 2 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 115 Address Type 2 IPB3 Input Port B[3] IWP2 Instruction Watchpoint 2 Visible Instruction Queue Flush Status 2 IPB4 Input Port B[4] LWP0 Load/Store Watchpoint 0 Visible Instruction Queue Flush Status 0 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 116 D-channel request signal for serial interface TDMb PB17 General-purpose I/O port B, bit 17 PHREQ[1] Least significant bit of PHY request bus RXADDR1 UTOPIA multi-PHY receive address line 1 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 117 Media independent interface receive data 2 L1RSYNCA Input receive data sync signal to TDM channel A PD14 General-purpose I/O port D, bit 14 UTPB[1] UTOPIA bus bit 1 input/output signal TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 118 General-purpose I/O port A, bit 13 PB22 General-purpose I/O port B, bit 22 TXADDR4 UTOPIA multi-PHY transmit address line 4 General-purpose I/O port C, bit 9 PORESET Power-on Reset RD/WR Read/Write Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 119 SPI output data in server mode or SPI input data in client mode PB29 General-purpose I/O port B, bit 29 Soft Reset SRESET Transfer Acknowledge Provides clock to scan chain logic DSCK Provides clock to the development port logic TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 120 Test reset for the JTAG scan chain logic Transfer Start TSIZ0 Transfer Size 0 Register TSIZ1 Transfer Size 1 TxD1 SCC1 Transmit Data PA14 General-purpose I/O port A, bit 14 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 121 Write Enable 2 BS_B2 Byte Select 2 on UPMB PCOE PCMCIA Output Enable Write Enable 3 BS_B3 Byte Select 3 on UPMB PCWE PCMCIA Write Enable XTAL Crystal oscillator output TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 122 Asynchronous memory output enable ARDY Asynchronous memory ready input Asynchronous memory read enable Asynchronous memory write enable Byte-enable control 0 Byte-enable control 1 Byte-enable control 2 Byte-enable control 3 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 123 External data bus 8 D[9] External data bus 9 D[10] External data bus 10 D[11] External data bus 11 D[12] External data bus 12 D[13] External data bus 13 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 124 Frame synchronisation signal for McBSP 1 FSR2 Frame synchronisation signal for McBSP 2 FSX0 Frame synchronisation signal for McBSP 0 FSX1 Frame synchronisation signal for McBSP 1 FSX2 Frame synchronisation signal for McBSP 2 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 125 Host data bus 3 HD[4] Host data bus 4 HD[5] Host data bus 5 HD[6] Host data bus 6 HD[7] Host data bus 7 HD[8] Host data bus 8 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 126 General-purpose configurable input/output 1 General-purpose configurable input/output 2 General-purpose configurable input/output 3 General-purpose configurable input/output 4 Nonmaskable external interrupt Device reset RST_MODE Device reset mode control SDCAS SDRAM address column strobe Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 127 IEEE Standard 1149.1 test data output TIN/TOUT0 Timer 0 input/output TIN/TOUT1 Timer 1 input/output IEEE Standard 1149.1 test mode select TRST IEEE Standard 1149.1 test reset Ground External flag output TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...

  • Page 128: Appendix E - Component Locations

    C511 5F11 C723 7F12 C972 9F13 C512 5D11 C804 C973 9D13 C513 5J11 C805 D101 1H3 1F3 C514 5H11 C900 D201 2G10 2F11 C515 5F11 C901 D500 5H10 5H9 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

  • Page 129: Tait Electronics Limited January

    E902 9G10 R203 D910 9H9 9G9 E910 9D12 R204 D911 F501 5K12 R205 DS100 1F12 F503 5J12 R206 DS101 1F12 F505 5F12 R207 DS200 F507 5D12 R208 2F7 2E7 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 130 5E12 Q900 R301 R302 R632 R903 R303 R633 R904 R400 R634 R905 R401 R636 R906 R402 4G7 4F5 R637 R907 R403 R638 R908 R404 R639 R909 R405 R640 R910 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...
  • Page 131 R530 R717 7F13 TP214 2B10 R531 R801 TP215 2B11 R532 R802 TP216 2B11 R533 R803 TP217 2B11 R534 R804 TP218 2B11 R535 R805 TP219 2B11 R600 R806 TP220 2B10 TB9100 Reciter Service Manual Appendices © Tait Electronics Limited January 2006...
  • Page 132 U302 W200 2B12 TP413 U400 4F12 4G6 W201 TP900 9A11 U500 W900 TP910 9A11 U501 5E8 5A7 5F8 Y200 U200 2B12 2J12 U600 U201 2A9 2E4 U601 6G13 6B8 Appendices TB9100 Reciter Service Manual © Tait Electronics Limited January 2006...

Table of Contents