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RAM104
User manual
Motorola RAM104 User Manual page 32
Processor/memory mezzanine module, dram memory module
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Motorola
RAM104
User Manual
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Table 2-2. CPU Connector Pin Assignments (J2) (Continued)
141
143
No Connection
145
No Connection
147
No Connection
149
TCLK_OUT
151
L2PRSNT0
153
L2ADSC
155
L2BAA
157
L2DIRTYI
159
L2DIRTYO
161
L2DOE
163
L2DWE1
165
167
L2TALE
169
L2TALOE
171
173
L2TWE
175
177
L2PRSNT1
179
SRESET
181
HRESET
183
185
CPUCLK1
187
CPUCLK2
189
CPUCLK3
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∗
TEA
No Connection
∗
∗
∗
∗
∗
∗
∗
HALTED (N/C)
∗
L2HIT
∗
∗
L2TOE
GND
∗
DRVMOD1 (N/C
L2TV
NAPRUN (N/C
∗
∗
∗
GND
CPU Connector (J2)
142
∗
DBG
144
∗
DBB
146
∗
ABB
148
∗
CPUGNT
150
∗
CPUREQ
152
∗
IBCINT
154
∗
MCHK
156
∗
SMI
158
∗
CKSTPI
160
∗
CKSTPO
162
164
∗
TLBISYNC
166
TBEN
168
∗
SUSPEND
170
DRVMOD0
172
174
176
∗
QREQ
178
∗
QACK
180
CPUTDO
182
CPUTDI
184
CPUTCK
186
CPUTMS
188
∗
CPUTRST
190
2
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