Mpc105 Pci Bridge/Memory Controller; Eeprom/Flash; Table 1-2. Clock Frequencies Supported By Pm603/Pm604 - Motorola RAM104 User Manual

MPC105 PCI Bridge/Memory Controller

The Motorola MPC105 device provides the necessary interface between
the MPC603/604 processor, the EEPROM/Flash, the DRAM, and the PCI
local bus. The MPC105 supports various PowerPC processor external bus
frequencies up to 66 MHz and PCI frequencies up to 33 MHz. The
following table summarizes the clock frequencies supported by the
PM603/PM604:

Table 1-2. Clock Frequencies Supported by PM603/PM604

Internal
Processor
Processor
Type
Speed
MPC603 66 MHz
MPC603 100 MHz
MPC603 200 MHz
MPC604 100 MHz
MPC604 133 MHz
The MPC105 asserts Machine Check Interrupt (MCP_) to the processor
upon detecting a high level on NMI. Refer to Interrupt Supports in the
MVME1603/MVME1604 Single Board Computer Programmer's
Reference Guide for additional information.

EEPROM/Flash

Two 32-pin PLCC/CLCC sockets contain the Flash chips. Chip speed is
150 ns. This memory is organized as two banks, each
512K x 8, giving 1MB total memory. 64-bit read or write access takes 80
clock cycles when using a 66 MHz bus clock. The two EEPROM/Flash
banks are 8-bit ports controlled by the MPC105. The MPC105 performs
byte alignment for write accesses (in Flash configuration) and also packs
bytes for 16-bit, 32-bit, and 64-bit read accesses to the EEPROM/Flash
area. The Flash memory is onboard programmable.
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MPC105
Processor Processor
Internal
External Clock
Clock
Bus Speed PLL
Frequency
66 MHz 1x 66 MHz
50 MHz 2x 50 MHz
66 MHz 3x 66 MHz
66 MHz 1.5x 66 MHz
66 MHz 2x 66 MHz
Functional Description
MPC105
MPC105
External PCI Bus
Clock
Clock Frequency
PLL
Frequency
33 MHz 2x 33 MHz
25 MHz 2x 25 MHz
33 MHz 2x 33 MHz
33 MHz 2x 33 MHz
33 MHz 2x 33 MHz
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