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Our power contribution example drops to 223 V x 2.1 m
= 468.3 mW. If a resistor is installed between the mains and
the diode, you further force the dissipation to migrate from
the package to the resistor. The resistor value should be
carefully selected to account for low−line startup.
Mains
Figure 28. A Simple Diode Naturally Reduces the
Average Voltage on Pin 8
3. Permanently force the V
with an auxiliary winding. It will automatically
disconnect the internal startup source and the IC
will be fully self−supplied from this winding.
Again, the total power drawn from the mains will
significantly decrease. By using this approach,
user need to make sure the auxiliary voltage never
exceeds the 16 V limit for all line conditions.
When FB pin voltage level is above the skip cycle threshold
(1.07 V by default), the peak current cannot exceed
0.9 V/R
. When the IC enters the skip cycle mode, the
sense
NCP1201
HV
1
8
2
7
Cbulk
3
6
4
5
level above VCC
CC
OFF
FB
Normal Current Mode Operation
Skip Cycle Operation
I
= 333 mV / R
p(min)
Figure 29. Feedback Pin Voltage and Modes of Operation
http://onsemi.com
Skipping Cycle Mode
The NCP1201 automatically skips switching cycles when
the output power demand drops below a preset level. This is
accomplished by monitoring the FB pin. In normal
operation, FB pin imposes a peak current according to the
load value. If the load demand decreases, the internal loop
asks for less peak current. When this set−point reaches the
skip mode threshold level, 1.07 V, the IC prevents the
current from decreasing further down and starts to blank the
output pulses, i.e. the controller enters the so−called Skip
Cycle Mode, also named Controlled Burst Operation. The
power transfer now depends upon the width of the pulse
bunches, Figure 29.
Suppose we have the following component values:
Lp, primary inductance = 1.0 mH
F
, switching frequency = 60 kHz
sw
I
(skip) = 200 mA (or 333 mV/R
p
The theoretical power transfer is therefore:
1
L p
2
If the controller enters Skip Cycle Mode with a pulse packet
length of 20 ms over a recurrent period of 100 ms, then the
total power transfer reduced to 1.2 W x 0.2 = 240 mW.
To better understand how this Skip Cycle Mode takes
place, a look at the operation mode versus the FB pin voltage
level shown below, immediately gives the necessary insight.
4.2 V, FB Pin Open
2.97 V, Upper Dynamic Range
1.07 V
sense
peak current cannot go below V
current limit reduction scheme, the skip cycle takes place at
a lower peak current, which guarantees noise free operation.
11
)
sense
I p 2
F sw + 1.2 W
/3.3. By using the peak
SKIP
(eq. 4)
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