Tclk; Auxin/Auxout Loopback - Quatech DSCLP-200 User Manual

Two and one channel rs-422/485 low profile asynchronous communications adapter for pci bus
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7.3 TCLK

This is the output clock signal used by the transmitter portion of the
UART. It is generally connected to the UART's own receive clock input (RCLK).
This is done by not connecting pins 1 and 2 of the jumper block J13. If desired,
TCLK can be transmitted to an external source over the AUXOUT line by
connecting pins 1 and 2 of the jumper block J12. Figure 18 shows how to select
the TCLK mode.
J13
RCLK0_SEL
Loopback TCLK to RCLK

7.4 AUXIN/AUXOUT Loopback

The AUXIN signal is an input from the external device, and connecting it
to the AUXOUT signal provides for a loopback mode of operation. In other
words, whatever signal is transmitted by the external device over the AUXIN line
will be fed back to the external device over the AUXOUT line. This mode is
accomplished by connecting pins 1 and 2 of the jumper blocks J11 and J12.
Figure 19 shows how to select this loopback mode.
Figure 19 --- AUXIN/AUXOUT loopback
DSCLP/SSCLP-200/300 User's Manual
Jumpers J11-13
Figure 18 --- TCLK selection
Jumpers J11-13
AUX0_SEL0
J11
AUX0_SEL1
J12
J13
RCLK0_SEL
Loopback AUXOUT to AUXIN
AUX0_SEL0
J11
AUX0_SEL1
J12
J13
RCLK0_SEL
Transmit TCLK on AUXOUT
40

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