Harman Kardon MAS 101 Service Manual page 27

D
Low Power Consumption
D
Wide Common-Mode and Differential
Voltage Ranges
D
Low Input Bias and Offset Currents
D
Output Short-Circuit Protection
D
Low Total Harmonic Distortion
0.003% Typ
description
The JFET-input operational amplifiers in the TL07_ series are designed as low-noise versions of the TL08_
series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low
noise make the TL07_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier
features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single
monolithic chip.
The C-suffix devices are characterized for operation from 0 C to 70 C. The I-suffix devices are characterized
for operation from – 40 C to 85 C. The M-suffix devices are characterized for operation over the full military
temperature range of – 55 C to 125 C.
V IO max
SMALL
T A
AT 25 C
OUTLINE
(D) †
10 mV 10 mV TL071CD TL071CD
6 mV TL071ACD
3 mV TL071BCD
10 mV 10 mV TL072CD TL072CD
0 C to 0 C to
6 mV TL072ACD
70 C
70 C
3 mV TL072BCD
10 mV 10 mV TL074CD TL074CD
6 mV TL074ACD
3 mV TL074BCD
TL071ID TL071ID
– 40 C to 40 C to
6 mV TL072ID
85 C 85 C
TL074ID
6 mV
– 55 C to 55 C to
6 mV —
125 C 125 C
9 mV
† The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL071CDR). The PW package is only available left-ended
taped and reeled (e.g., TL072CPWLE).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
AVAILABLE OPTIONS
CHIP CERAMIC CERAMIC
CARRIER DIP DIP
(FK) (J) (JG)
— — —
— — —
— — —
— — —
TL071MFK — TL071MJG
TL072MFK — TL072MJG
TL074MFK TL074MJ —
POST OFFICE BOX 655303
25
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996
D
Low Noise
V = 18 nV/ Hz Typ at f = 1 kHz
n
D
High Input Impedance . . . JFET Input Stage
D
Internal Frequency Compensation
D
Latch-Up-Free Operation
D
High Slew Rate . . . 13 V/ µs Typ
D
Common-Mode Input Voltage Range
Includes V
CC +
PACKAGE
PLASTIC PLASTIC
DIP DIP
(N) (P)
TL071CP TL071CP
— TL071ACP
TL071BCP
TL072CP TL072CP
—
TL072ACP
TL072BCP
TL074CN TL074CN
—
TL074ACN
TL074BCN
— TL071IP TL071IP
— TL072IP
TL074IN —
— —
— TL072MP
TL074MN —
Copyright
DALLAS, TEXAS 75265
TSSOP FLAT
PACKAGE PACKAGE
(PW) (W)
TL071CPWLE TL071CPWLE
— —
—
TL072CPWLE TL072CPWLE
—
—
—
TL074CPWLE TL074CPWLE
—
—
—
— —
—
— —
TL074MW
1996, Texas Instruments Incorporated
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