Typical Application Diagram
Internal Block Diagram
1
LUVP
2V/1.5V
10ms
Soft Start
65kHz Clock
with
Frequency
Modulation
Latch/
2
Plimit
4V
Plimit
Offset
Generator
FAN7602 Rev. 1.0.1
FA N 7602
Figure 1. Typical Flyback Application
LUVP
Auto Restart
OLP
Protection
OVP
Latch
Latch
Protection
SS End
Latch
OLP
Plimit
Offset
OLP
Soft
Start
Figure 2. Functional Block Diagram of FAN7602
Vstr
8
SS End
Reset
Circuit
5V Ref
Vcc
PWM
Block
Delay
Circuit
0.95V/0.88V
PWM+
Soft
Start
14
6
Vcc
OVP
19V
12V/8V
UVLO
Driver
OUT
5
Circuit
Plimit
Offset
3
CS/FB
Power Limit
Plimit
Offset
4
GND
www.fairchildsemi.com