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Texas Instruments QFN Layout Manuallines
Texas Instruments QFN Layout Manuallines

Texas Instruments QFN Layout Manuallines

Hpl audio power amplifiers

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........................................................................................
Yang Boon Quek
1
Introduction
Board layout and stencil information for most Texas Instruments (TI) Quad Flat No-Lead (QFN) devices is
provided in their data sheets. This document helps printed-circuit board (PCB) designers understand and
better use this information for optimal designs.
The QFN package is a thermally enhanced standard size IC package designed to eliminate the use of
bulky heat sinks and slugs. This package can be easily mounted using standard PCB assembly
techniques and can be removed and replaced using standard repair procedures.
The QFN package is designed so that the lead frame die pad (or thermal pad) is exposed on the bottom
of the IC (see
Figure
the exterior of the package.
SLOA122 – July 2006
Submit Documentation Feedback
1). This provides an extremely low thermal resistance (θ
Plastic Mold Compound
IC (Silicon)
Exposed Thermal Pad Located
Underneath the Package
Leadframe (Copper Alloy)
Figure 1. Section View of a QFN Package
QFN Layout Guidelines
Die Attach (Epoxy)
Application Report
SLOA122 – July 2006
HPL Audio Power Amplifiers
) path between the die and
JC
QFN Layout Guidelines
1

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Summary of Contents for Texas Instruments QFN Layout

  • Page 1 HPL Audio Power Amplifiers Introduction Board layout and stencil information for most Texas Instruments (TI) Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board (PCB) designers understand and better use this information for optimal designs.
  • Page 2: Board Layout

    Copper areas on and in a PCB act as heat sinks for the QFN device. Top copper areas should be covered with solder mask leaving only the solder mask defined thermal pad exposed. The top copper areas should be made as large as possible. QFN Layout Guidelines SLOA122 – July 2006 Submit Documentation Feedback...
  • Page 3 (see Figure Exposed Copper – 0,05 mm Around Via Solid Via Web or Spoke Via Recommended NOT Recommended Figure 5. Via Connection at the Bottom of the Copper Plane SLOA122 – July 2006 QFN Layout Guidelines Submit Documentation Feedback...
  • Page 4 50% of thermal pad area is soldered (less than 50% voiding) when using 0,127-mm thick stencils. Protrusions might cause misalignment in stencil on the reverse side of the PCB (see Figure QFN Layout Guidelines SLOA122 – July 2006 Submit Documentation Feedback...
  • Page 5 Figure 9. Recommended Stencil Openings and Thickness for RGZ Package Use cross-hatching in the thermal pad stencil opening of a QFN device. This prevents excessive amount of solder paste applied thus prevents solder bridging (see Figure 10). SLOA122 – July 2006 QFN Layout Guidelines Submit Documentation Feedback...
  • Page 6: Additional Information

    TI recommends the use of type 3 or finer solder paste when mounting a QFN. Additional Information For detailed information on the QFN package including thermal modeling considerations and repair procedures, see (SLUA271) QFN/SON PCB attachment. QFN Layout Guidelines SLOA122 – July 2006 Submit Documentation Feedback...
  • Page 7 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...