Memory; Rom - David Griffith P112 Assembly And Operation Manual

location in physical address space. If sufficient RAM is present, the ROM will
be copied into low RAM, and afterwards disabled. This enables the CPU to be
run faster.
The memory setup routine makes two requirements:
1. If two RAM chips are fitted, they must be of the same size.
2. The address-decode jumper P1 must be correctly set.
If these requirements are not met, the startup code will malfunction.
7.2

Memory

The board is designed to accept a wide variety of memory parts, in both 28 and
32-pin packages. The 0.6" DIP format was chosen as being compatible with the
widest range of parts.
One ROM socket and two RAM sockets are provided. A pre-programmed ROM
can be fitted in a RAM socket if desired. On-board RAM capacities from 32kB
to 1MB are available.
The jumper P3 can interchange the select signals for the ROM and RAM-1 sites.
This permits a pre-programmed ROM to be fitted in RAM-1 (U3), to program
a blank flash device in U4. See section 10.2.
7.2.1

ROM

The ROM socket (U4) can accept a 32kB flash ROM part. The board includes
facilities for in-system programming of 5V and 12V flash ROMs. For normal
use, the header P12 should be jumpered across Pins 2-3 (/WE). For 12V parts
(Intel or AMD 28F256), the 12V regulator U12 is required. At power-up, this
converter will be disabled, causing a Vpp of 5V to be supplied via D2. This
makes the circuit safe with 5V ROMs also. To program a ROM, set the CPU
parallel port pin A5 low: this enables the 12V supply.
Since this board is supplied with an Atmel 29c256 and requires only 5V for
programming, the voltage regulator U12 has been omitted. Parts Q1 and D2
are still preinstalled. R3 and R4 are in the bag of parts. This omission was
made because U12 is a fairly expensive part at US $10 apiece. If you wish to
use a 12-volt flash part, then you must obtain the regulator yourself.
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