Summary of Contents for David Griffith P112
- Page 1 P112 Single Board Computer Assembly and Operation Manual Revision 1.1 David Griffith Wednesday May 10, 2006...
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Page 3: Table Of Contents
Contents 1 Introduction 1.1 What is this thing? ......1.2 What do I need to know? . - Page 4 6.4 An Example ......7 Logic Description 7.1 CPU ........7.1.1 Serial Port .
- Page 5 10 Software 10.1 Z System and ZSDOS ......10.2 Flash Programmer ......10.3 DISKCOPY .
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Page 6: Introduction
The P112 was designed by David Brooks in 1996. He sold boards with the five surface-mount components preinstalled for about a year, then stopped due to lack of demand. Since then, the P112 has gained a reputation as a well- designed machine for running CP/M and similar operating systems. In late 2004, in response to growing interest in the P112 board, another run of boards was produced by David Griffith. -
Page 7: What's Not In This Kit
One 3.5” floppy disk This is a ZSDOS boot disk created by Terry Gulczynski specifically for this new run of P112 boards. The boot disk supplied by David Brooks with the first run of P112 boards will still work, but is discouraged. - Page 8 particularly important. Just make sure it’s okay for electronics use and you have the correct flux remover. Radio Shack stocks suitable paste flux and flux remover. Picks, tweezers, and brushes will be handy. Desoldering braid is essential for cleaning up mistakes. Don’t fool yourself into thinking you won’t make any mistakes.
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Page 9: Cables And Components
Cables and Components Cables All the basic I/O connections are at the left edge of the PCB. You will need the following cables to run the board: 2.1.1 Power Cable Connects to P6. Reading from top to bottom the pins are Reset The Reset pin may be left unconnected (it has a pull-up). -
Page 10: Disk Drive Cable
9 8 7 6 5 4 3 2 1 Serial connector with null modem crossovers (solder side view). This will allow you to connect the P112 to an x86-style serial port with a cable wired straight through. Again, depending on your terminal, you may be able to use a standard 9-to-25-pin modem cable to connect the P112 to a standard serial terminal. -
Page 11: Complete List Of Parts
Complete List of Parts Capacitors Qty. Markings Location 22ρF ceramic 220k (blue) C25 C26 120ρF ceramic 121 J5A (blue) .1µF bypass 104 CSR (tan) C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C28 C29 C30 1µF, 16V tantalum C10 C11 C27 22µF, 10V tantalum 22µ... - Page 12 Headers Qty. Location 2 pins 3 pins 5 pins 2x2 pins (4 pins) 2x5 pins (10 pins) 2x10 pins (20 pins) 2x13 pins (26 pins) 2x17 pins (34 pins) 1x3 and 1x1 together The header at P1 is a T-shaped header made from a 1x3 strip and a single pin by itself.
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Page 13: Construction
Construction Before Anything Else Before you do anything else, please take the time to completely go through this manual. Done? Okay, let’s begin. Getting Started It’s a good idea to have a few paper plates or bowls handy for spreading parts out while keeping them neatly coralled and organized. -
Page 14: Soldering The First Parts
I’ll assume you know how to solder. Remember that this is not a raw beginner’s project. Soldering the First Parts RTC Crystal Solder the low-lying parts first. Since we’ll mount the resistors on edge, the chip sockets look like the logical choice. Don’t do that yet. We’ll start with the RTC clock crystal (Y2). - Page 15 Discrete Resistors To save space, the P112 board was designed to have its discrete resistors mounted vertically. Hold a resistor with the gold band facing down. Bend the top lead over so it’s parallel to the lower one. Mount the resistor with its body in the circle silkscreened in its footprint.
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Page 16: Setting Up
NVRAM is in use (which is most of the time). The jumper may be removed in order to blank the NVRAM contents. If the P112 board will be unused for a long period of time, the battery itself should be removed to avoid the possibility of leakage. -
Page 17: Terminal Settings
Caution: Lithium batteries have a low internal impedance. Do not place the populated board on a metallic surface, in case you short the solder pads on the bottom side. It’s recommend that you put an insulating sheet under the battery area, to guard against accidents. -
Page 18: Powering Up
RAM available: 64kB. From 40000 to 4FFFF Z80 Series ROM-Resident Debugger V1.06: D-X Designs Pty Ltd 1997 Special P112 version: interrupts supported Type "?" for help should appear. You can type “?” for a list of commands and experiment with the ROM-resident debugger (see below). - Page 19 ; You can do so by running the following command line now: ; TCSELECT Z3TCAP.Z3T ; This command will open a library of TCAP definitions, and ; allow you to select the one that fits your terminal. When ; the program finishes, enter the following command line: ;...
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Page 20: Debugger
Debugger This section gives a quick guide to using the ROM debugger. Note that this code operates differently than, for example, ZSID. Help Function Entering “?” at a command prompt will display the help screen: C O M M A N D H E L P Separate all fields by one or more blanks Commands Available:... -
Page 21: Set Breakpoint
Set Breakpoint A single software breakpoint may be set at any editable location, by entering B addr The break is implemented by jamming a RST 38H instruction in that location, cancelling any pre-existent breakpoint. Unlike (for example) MSDOS DEBUG, breakpoints are persistent: they are not automatically cleared when the test- program hits them. -
Page 22: Go (Run Program)
If “D” is entered alone on a line, the missing address defaults to zero. Since altering address zero is not permitted, the message Cannot edit memory in this area is displayed. Go (Run Program) The command is G [addr] Any set breakpoint is activated, and control passes to the test program. Reg- isters will be loaded with the values shown by a “Display / Set Register”... -
Page 23: Display / Set Registers
Display / Set Registers If this command is entered with no parameters, the current register values are displayed, as follows: A F B C D E H L A’ F’ B’ C’ D’ E’ H’ L’ IX SP <Instr.> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0000 0000 0000 0000 00 00 00 The 3 bytes at &... -
Page 24: Input From Port
Input from Port The command I <port> will read and display a single byte from the given port address. A 16-bit address is allowed, and the high-order bits will be set correctly. For an 8-bit address, they will be zero. Output to Port The command O <port>... -
Page 25: Ds-1302 Ram Parameters
BPS rates are determined by dividing the CPU clock pulses. If you mess this up and forget what speed you set the P112 console to, simply turn off power to the board, remove the jumper at P11, wait a few seconds, replace the jumper, then turn the machine back on. - Page 26 The P112 board can support homebrewed SCSI and IDE/ATA interfaces. Chips can be salvaged from SCSI interfaces for other machines and installed onto a board for the P112. The GIDE interface does not use a salvaged controller chip, but instead uses programmable logic chips. These interfaces, however, are beyond the current scope of this manual.
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Page 27: Troubleshooting
PCB jumpers are correct! Disk Drive Won’t Work First off, make sure you didn’t hook up the drives incorrectly. The P112 was designed so that you could screw it to the underside of a floppy drive. This means that the socket on a floppy ribbon cable that used to be for “Drive A”... - Page 28 much more by simulating the boot process manually. Use the debugger to enter the following bytes in memory: 8000: CF ;RST 08, ie disk services 8001: FF ;RST 38, ie break to debugger Now set up registers as follows (registers not listed are don’t care): A 02 ;"Read"...
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Page 29: An Example
Byte 1 Bits 7, 6 00 - Normal termination 01 - Abnormal termination (This is a normal termination, in this system) 10 - Invalid command 11 - Abnormal due to polling Bit 5 Seek or Recalibrate complete Bit 4 Track-0 signal not found Bit 3 Unused Bit 2... -
Page 30: Logic Description
Logic Description The following descriptions should be read in conjunction with the accompa- nying schematics. Data sheets on the various chips are obtainable from the manufacturers’ web sites. Zilog recommend two parts for new designs: the Z84C15 and Z80182. For the present project, the Z80182 is appropriate, providing a Z180 core, with enhanced memory mapping features. -
Page 31: Parallel Port
7.1.2 Parallel Port The Z80182 has one 8-bit parallel port available (the others have been overrid- den for other functions). This is used to support on-board facilities. The pin assignments are: A0 RTC data I/O line (bidirectional) A1 RTC Clock line A2 RTC Reset line A3..A4 Not used A5 Set low to enable the 12V Vpp generator for flash ROMs... -
Page 32: Memory
location in physical address space. If sufficient RAM is present, the ROM will be copied into low RAM, and afterwards disabled. This enables the CPU to be run faster. The memory setup routine makes two requirements: 1. If two RAM chips are fitted, they must be of the same size. 2. -
Page 33: On-Board Ram
7.2.2 On-Board RAM Each RAM socket may accept a 32kB, 128kB or 512kB SRAM part. The address decoding must be set for the parts in use, as follows: RAM size RAM part (typical) P1 setting P13 setting 32kB/64kB HM62256 1-4(A15) 1-2(Vcc) 128kB/256kB HM628128... -
Page 34: Expansion Socket
Expansion Socket The CPU bus is brought out to the expansion socket J1. Access to expansion memory has been described above. For external IO devices, /IORQ low and /M1 high should be decoded to validate an IO access. Valid addresses for expansion boards are in the ranges 40. -
Page 35: Serial Port 2
the address may malfunction, due to these spurious /IORQ signals. In the present design, this is prevented by the latch U8. This is set at the beginning of a interrupt acknowledge cycle (/M1 and /IORQ both low), and blocks any address decodes. The latch is only cleared when /IORQ again goes high, at the end of the acknowledge cycle. -
Page 36: Major Components
Major Components The principal components are briefly introduced below, with particular reference to their use in the present application. CPU Chip The Z80182 provides a Z180 CPU core, multi-function serial IO port, and two DMA channels. Extensive use is made of the Z180’s memory mapping ability, to fill in “holes”... -
Page 37: Flash Rom
Function Address (CPU) Address (IO Chip) Parallel Port 8C. . .8F 3BC. . .3BF Diskette (program access) 90. . .97 3F0. . .3F7 Serial Port 98. . .9F 3F8. . .3FF Diskette (DMA Access) A0. . .BF Flash ROM The board is designed to program a variety of flash ROM parts. If 5V-only parts (eg Atmel) are used, the voltage converter U12 and its associated components may be omitted. -
Page 38: Connector Pins
Connector Pins The pin assignments of the various connectors are tabulated below. All are 0.1” pitch headers. P1 — RAM Size Selector Assigment Address decoder input A17 (128kB chips) A19 (512kB chips) A15 (32kB chips) This jumper selects the address at which the address logic switches between the RAM chips. - Page 39 the bottom-right. This jumper allows the ROM (U4) and RAM-1 (U3) sockets to be logically interchanged. The effect is that the CPU will boot from RAM-1. This enables the board to serve as a flash-ROM duplicator, using the following procedure. Set P3 in the “normal”...
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Page 40: P4 - Serial Port 1
P4 — Serial Port 1 Assigment DCD (in) DSR (spare in) RXD (in) RTS (spare out) TXD (out) CTS (in) DTR (out) SYNC/RI (in) Ground Not used Pin 1 is at the top-left when holding the board with the battery to the bottom- right. -
Page 41: P6 - Power Supply / Reset
P6 — Power Supply / Reset Assigment Ground Reset Ground Pin 1 is at the top when holding the board with the battery to the bottom- right. This isn’t terribly important though since the pinout remains the same if reversed. The reset input is intended for a switch to ground. -
Page 42: P8 - Serial Port 2
Pin 1 is at the top-left when holding the board with the battery to the bottom- right. The pin assignment is such that a 26-way ribbon cable (with line 26 removed) may run direct to a DB-25 connector, presenting a standard IBM parallel printer interface. -
Page 43: P9 - Disk Drives 0 And 1
P9 — Disk Drives 0 and 1 Assigment /DENSEL Not used DRATE0 /INDEX /MTR0 /DR1 /DR0 /MTR1 /DIR /STEP /WDATA /WGATE /TK0 /WPROT /RDATA /HDSEL /DSKCHG Pin 1 is at the bottom-right when holding the board with the battery to the bottom-right. -
Page 44: P12 - Rom Pin-3 Function
9.12 P12 — ROM Pin-3 Function Assigment U4 pin 3 /Memory Write Pin 1 is at the left when holding the board with the battery to the bottom-right. This jumper connects Pin 3 of the ROM socket either to /MWR, or to Vdd. For normal use, connect to /MWR. - Page 45 Pin 1 is at the top-left when holding the board with the battery to the bottom- right. This connector carries unbuffered signals for the spare CPU serial ports. Un- committed inputs have 47kΩ pull-up resistors. The signal names follow those used in the Z80182 data-book, which should be consulted for the capabilities of these ports.
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Page 47: J1 - Bus Expansion
9.15 J1 — Bus Expansion Assigment Ground Ground /RAMCS /Mem-Read /Mem-Write Ground /WAIT (input to CPU) /IORQ /ROMCS /RST (reset) /INT0 (dedicated interrupt) /TEND0 (DMA Ch-0 End signal) /TEND1 (DMA Ch-1 End signal) IEI (daisy-chain interrupt enable in) /EXTRQ (Z-80 vectored interrupt) PHI (main CPU clock) IEO (daisy-chain out) Ground... - Page 48 In essence, a subset of the CPU bus is brought out on these pins. The lines are unbuffered, and are not intended to drive long backplane lines. The pin assignments are such that for basic IO functions, only the two outer rows of the connector are used.
- Page 49 10.1 Z System and ZSDOS For this new release of the P112, Terry Gulczynski has painstakingly prepared a set of system disks based on the Z-system. Z-system (or ZSDOS) is a CP/M “look-alike” with lots of very useful enhancements. In your kit is a boot disk.
- Page 50 10.2 Flash Programmer The application used for programming flash chips for the 1996 run of P112 boards was written for DOSPLUS and does not yet work under ZSDOS. Please don’t fool around with it unless you really know what you’re doing and you have a chip programmer besides the P112 handy.
- Page 51 Warranty, Etc. If you have purchased this board fully assembled, David Griffith of Griffith Consulting warrants it in respect of faulty components or workmanship, for a period of ninety days from delivery, providing it has not been subject to damage or abuse. Defective boards must be returned, freight prepaid, to our United States address.
- Page 52 DX3500 digital camera was used for photographs. NetPBM was used for further processing and conversion. The designer of the P112, Dave Brooks, has a website on the P112 at http://members.iinet.net.au/~daveb/p112/p112.html. A new website, specifically for this release of the P112 is at http://www.cs.csubak.edu/~dgriffi/proj/p112...
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