Audio Interface Signals - Daewoo DVDP485 Service Manual

PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE
COMP AO
VREF AO
AVD33 (4)
AP
AVSS (4)
AG
AVDDref
AP
AVSSref
AG
VDDDAC
DP
VSSDAC
DG
GPA4/Hsync I/O
GPA5/Vsync I/O

4.5 Audio Interface Signals

Pin name Type
ACLK I/O
PCMCLK O
PCMSD0 O
PCMSD1 O
PCMSD2 O
PCMSD3 O
PCMWS O
S/PDIF O
ADCCLK O
ADCWS O
MIC_SD I/O
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Compensation pin. A 0.1 uF ceramic capacitor with lead length as short as possible
must be used to decouple power noise.
Voltage reference output. Typical value is 0.9V. A 0.1uF ceramic capacitor decouples
this pin to AVSSref
3.3v analog power supply for video DAC, each for one channel
Analog ground for video DAC, each for one channel
3.3v analog reference voltage supply for TV encoder DAC
Analog reference ground for TV encoder DAC
3.3V digital power supply for TV encoder DAC
Digital ground for TV encoder DAC
General purpose IO bus A bit 4, initial in input state/Horizontal sync output; GPA4 by
default
General purpose IO bus A bit 5, initial in input state/Vertical sync output; GPA5 by
default
Description
Clock for audio sampling rate. Its frequency can be 256fs or 384fs. (fs is audio
sampling rate.) The default is in output state and 384fs.
Audio PCM clock output
PCM Serial Data output for left/right channel or stereo L/R channel
PCM Serial Data output for left surround/right surround channel
PCM Serial Data output for center/LFE channel
PCM Serial Data output for downmixed L/R channel
PCM channel word select output
IEC-958 self-clocking digital serial output for compressed AC3, compressed DTS,
compressed MPEG or stereo PCM.
Serial clock output for microphone input.
Word select output for microphone input.
Digital microphone serial PCM input.
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