Integra DTR-5.9 Service Manual page 64

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-27
Q8001 : FLI30502 (LCD TV Controller with Worldwide Standard Sound Processor
and HDMI Receiver)-9/12
TERMINAL DESCRIPTION
TTL Display interface
Pin Name
PBIAS
PPWR
AVDD_LV_33
AVSS_LV
R0
R1
R2
R3
R4
R5
R6
R7
G0
G1
AVSS_OUT_LV
AVDD_OUT_LV_33
G2
G3
G4
G5
G6
G7
B0
B1
B2
B3
AVSS_OUT_LV
AVDD_OUT_LV_33
PD20/B4
PD21/B5
PD22/B6
PD23/B7
DEN
DHS
DVS
DCLK
Palallel / Serial ROM interface
Pin Name
A20
A19
A18
Pin # I/O Description
8-Bit Panels
O
71 Panel Bias Control (backlight enable, tri-state output, 5 V tolerant).
O
72 Panel Power Control (tri-state output, 5 V tolerant).
---
74 Digital Power for LVDS Block. Connect to digital 3.3V supply.
73 --- Ground for TTLL outputs.
75 O Red channel bit 0 (Even).
76 O Red channel bit 1 (Even).
O
77 Red channel bit 2 (Even).
O
78 Red channel bit 3 (Even).
O
79 Red channel bit 4 (Even).
O
80 Red channel bit 5 (Even).
81 O Red channel bit 6 (Even).
82 O Red channel bit 7 (Even).
83 O Green channel bit 0 (Even).
O
84 Green channel bit 1 (Even).
G
85 Ground for TTL outputs.
DP
86 Digital Power for TTL outputs. Connect to digital 3.3 V supply.
O
87 Green channel bit 2 (Even).
88 O Green channel bit 3 (Even).
89 O Green channel bit 4 (Even).
90 O Green channel bit 5 (Even).
O
91 Green channel bit 6 (Even).
O
92 Green channel bit 7 (Even).
O
93 Blue channel bit 0 (Even).
O
94 Blue channel bit 1 (Even).
95 O Blue channel bit 2 (Even).
96 O Blue channel bit 3 (Even).
97 G Ground for TTL outputs.
DP
98 Digital Power for TLL outputs. Connect to digital 3.3 V supply.
O
99 Blue channel bit 4 (Even).
O
100 Blue channel bit 5 (Even).
O
101 Blue channel bit 6 (Even).
102 O Blue channel bit 7 (Even).
67 O Display Data Enable.
68 O Display Horizontal Sync.
O
69 Display vertical Sync.
O
70 Display Pixel Clock.
Pin # I/O Description
42 O Address Signal A20 for 2M x 8 PROM. This pin also acts as GPIO10.
41 O Address Signal A19 for 1M x 8 PROM / 2M x 8 PROM. This pin also acts as GPIO9.
105 O Address Signal A18 for 512K x 8 PROM / SRAM. This pin also acts as GPIO49.
6-Bit Panels
Not used.
Not used.
Red channel bit 0 (Even).
Red channel bit 1 (Even).
Red channel bit 2 (Even).
Red channel bit 3 (Even).
Red channel bit 4 (Even).
Red channel bit 5 (Even).
Not used.
Not used.
Green channel bit 0 (Even).
Green channel bit 1 (Even).
Green channel bit 2 (Even).
Green channel bit 3 (Even).
Green channel bit 4 (Even).
Green channel bit 5 (Even).
Not used.
Not used.
Blue channel bit 0 (Even).
Blue channel bit 1 (Even).
Blue channel bit 2 (Even).
Blue channel bit 3 (Even).
Blue channel bit 4 (Even).
Blue channel bit 5 (Even).
DTR-5.9