Schematic Diagrams - Integra DTR-5.9 Service Manual

A

SCHEMATIC DIAGRAMS-12

WAVEFORM SECTION-1/3
Digital Audio Waveform Part
1
<Notes>
1. WF01 is short for Waveform-01 .
2. Refer to SD-3 (SCHEMATIC DIAGRAMS-3) for the location of each waveform on circuit.
3. SD-x : XY is short for Schematic Diagrams-x and each socket's location, X=A to H, Y=1 to 5.
LR CLOCK (SAI_LRCK, CX_LRCK)
Fs = 48kHz : DVD, Clock width = 20.8 s
Fs = 44.1kHz : CD, Clock width = 22.7 s
BIT CLOCK (SAI_SLCK, CX_SLCK)
64Fs = 3072kHz : DVD, Clock width = 325ns
64Fs = 2822.4kHz : CD, Clock width = 354ns
WF01 OPT1 (SD-3 : C5)
2
Duty varies according to audio data
WF04 SAI_LRCK
3
20.8 s
WF07 CX_LRCK (SD-3 : D4)
4
20.8 s
WF10 AUDIO_FL
5
Analog audio waveform with
aliasing noise
B
WF02
4.0V
Duty always varies according to
audio data
(SD-3 : C4) WF05
3.3V
WF08
3.3V
(SD-3 : F2) WF10
2.8V
0V
Aliasing noise in no audio data
COAX1 (SD-3 : C5)
5.0V
SAI_SLCK (SD-3 : C4)
3.3V
325 ns
CX_SCLK (SD-3 : D4)
3.3V
325 ns
AUDIO_FL (SD-3 : F2)
220mVp-p
C
WF03 SAI_SDOUT (SD-3 : C5)
Duty varies according to audio data
WF06 CX_SDIN1 (SD-3 :D4)
20.8 s
WF09 DAC_OUT- (SD-3 : E2)
Analog audio waveform with
aliasing noise
DTR-5.9
D
3.3V
3.3V
2.8V
0V