Flash Memory; Tod/Nvram; Ffb2 Graphics; Communication Ports - Sun Microsystems SPARCengine Ultra AXi Technical Manual

Caution – Use 60 ns DIMMs only on the Ultra AXi motherboard.
3.3.3

Flash Memory

There is a 1Mx8bit Flash memory device on the EBus2. This is pre-programed with
the OBP code. The CPU fetches initial executable codes from Flash memory upon
power-on. The Flash memory is field reprogammable.
3.3.4

TOD/NVRAM

The Non-Volatile Memory PROM and a Time of Day (TOD) clock are both contained
in a module mounted on the motherboard. This module has its own lithium battery
to operate the clock and to keep the contents of the NVRAM during power-off
situations. This module is field removable. Module is a SGS Thomson
Microelectronics SGS-M48T59Y.
3.3.5

FFB2 Graphics

This is a high speed, high resolution graphics card, made and supported by Sun. It
interfaces directly with the CPU over the high performance UPA64S bus. The
motherboard accommodates one FFB2 card which is optional for high performance
video applications.
Note – The FFB2 card obstructs one PCI slot. When this card is installed, only 5 PCI
slots are available
3.3.6

Communication Ports

There are two serial communication ports available to the user, both ports are wired
to a single 25-pin connector, J1802, accessible at the rear panel. See A.4.2 on page A-
27. Both ports are capable of communicating with an interface at RS-232 level
(+12V to -12V swing) and RS-423 level (+5V to Gnd) by jumper settings on J1804 and
J1806. See TABLE A-1 on page A-3 and FIGURE A-1 on page A-2. Each channel is
progammable to operate in synchronous mode or asynchronous mode. In
asynchronous mode each channel is programmable to operate at various baud rates.
In synchronous mode, the program selects to the clock, or may be programmed to
3-6 SPARCengine Ultra AX i OEM Technical Manual • May 1999