Theory Of Operation; Overview; Controller Board; Microcomputer Power-Up And Reset Routine - Motorola GP68 Service Manual

Overview

This section provides a detailed theory of operation for the
GP60 Series Radios and its components.
The GP60 Series radio consists three main boards; Control-
ler board, rf board and display board. The controller board is
connected to the rf board through a 20 lines flex ribbon cable.
The display board is connected to the controller board
through a 14 pins board-to-board connector. The top key
pads are embedded on a flex that makes connection to the
controller via 20 pins connector.

Controller Board

Controller board is the heart of the radio. It contains micro-
computer (U401), AFIC (audio processor IC, U451), general
5 volt regulator (U302), 5 volt regulator with reset to power
up the microcomputer (U456), Unswitch ram back up 5 volt
regulator (U457), audio power amplifier IC (U454), MIC
amplifier (U452-1)and rf power control circuitry/APC
(U152, U150).
Microcomputer
The GP60 Series VHF and UHF radios use the Motorola
68HC11E20 microcomputer, U401, which utilizes:
• 7.9488 MHz clock rate
• Single chip mode operation
• 16-bit addressing
• Internal watchdog circuitry
• Analog to digital conversion input ports
The microcomputer's operating program is permanently
written or "masked" within the microcomputer. Included in
U401 is an EEPROM memory which stores channel, signal-
ling, and scan list information.
Microcomputer Power-Up and Reset
Routine
On power-up U401's reset line (pin 43) is held low by the
AFIC (U451) until the synthesizer (U201, on the rf board)
provides a stable 2.1 MHz output. When U451 releases its
control, U401's hardware holds the reset line low until it ver-
ifies that clock Y401 is operational. When the reset line goes
high, U401's hardware delays briefly to allow Y401 to stabi-
lize, then the software begins executing port assignments,
RAM checking, and initialization. A fixed delay of 100 mS
March, 1997

Theory of Operation

is added to allow the audio circuitry to settle. Next, an alert
beep is generated and the steady state software begins to exe-
cute (buttons are read, radio circuits are controlled).
U401's reset line can be controlled directly by the 5 V regu-
lator (U456), the AFIC, and the microcomputer, and indi-
rectly by the synthesizer. U456 drives the reset line low (via
pin 3) if it loses regulation. This prevents possible latch-up
or overwriting of registers in the microcomputer because the
reset line is higher in voltage than pin 55 of U401 (VDD).
U401 can drive the reset line low if it detects a fault condition
such as an expired watchdog timer, software stuck in an infi-
nite loop, unplanned hardware inputs, static zaps, etc.
The AFIC and synthesizer can control the reset line during
power-up, as outlined above.
Transmit and Receive Audio
Circuitry
The GP60 Series Radios receive (Rx) and transmit (Tx) cir-
cuits are common to both the VHF and UHF models. Most
of the radio processing for Rx and Tx is accomplished in
U451, the Audio Filter IC. The Audio Filter IC performs the
following functions:
• Tone/Digital PL encoding and decoding
• PL rejection filter (Rx audio)
• Tx pre-emphasis amplifier
• Limiter
• Post-limiter filter
• Tx deviation digital attenuators
• MIC gain attenuator
• Noise squelch digital attenuator
• Microcontroller port expanders (output only)
• 2.5 Vdc reference source
U451 parameters are programmed from U401 microcontrol-
ler ROM and EEPROM data via the serial CLOCK and
DATA lines. Unless otherwise indicated, all signal levels
refer to standard carrier modulation, 1 kHz tone at ± 3 kHz
deviation.
6881086C09-O
Section 2
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