Foundation Logic View Configuration Manual page 36

2.20
Allocated Modbus Addresses
FIFO is allocated by the LOGIC VIEW in a Modbus area 4xxxx (register). PTR is a pointer to the
beginning of the Modbus address of the FIFO (relative Modbus Addresses). For example, if FIFO
has 16 registers (words), Modbus registers 42501 to 42516 are addressed as 0 to 15.
Bits Sequency to FIFO control word
Only Configuration
15 11 10
Auxiliary and PRM Passing
- Status indication bits:
Bit 0 - Is the EN boolean input status
Bit 1 - Is the LOAD boolean input status
Bit 2 - Is the UNLOAD boolean input status (1=UNLOAD; 0=NONE)
Bit 3 - Is the CLEAR boolean input status (1=CLEAR; 0=NONE)
Bit 4 - Is the ENO boolean output status
Bit 5 - Is the EMPTY boolean output status
Bit 6 - Is the TRIGGER boolean output status (Trigger Quantity Matched)
Bit 7 - Is the FULL boolean output status
Configuration Only
Bit 11 Bit 8
0 0 - STANDARD MODE
0 1 - MOVING WINDOW MODE
1 0 - CIRCULAR QUEUE MODE
1 1 - CIRCULAR QUEUE MODE
The Circular Queue Mode is implemented only from firmware version XX.55*
* The details of equipment version can be seen on figure 3.2 of this manual.
- Select the acquisition:
Bit 9 Bit 10
0 0 Save data on FIFO and last time-stamp on the Control Table.
1 0 Save data to FIFO and no time-stamp at all.
0 1 Save data with time-stamp on every sample on the FIFO.
Auxiliary and Parameter Passing
9 8 7 6 5 4 3
(1=LOAD; 0=NONE)
Note
2 1 0
Function Blocks