Sony SSC-DC593 Service Manual page 46

IC
CXD9160TQ (SONY)
CAMERA SIGNAL PROCESSOR
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PIN PIN
I/O SIGNAL I/O
NO. NO.
1 — V (3.3 V) 26 —
CC
2 — V (2 V) 27 I
CC
3 I PBLK 28 I
4 I BUNRI 29 O
5 I TMC1 30 O
6 I TMC2 31 O
7 I MODE1 32 I
8 I MODE2 33 I
9 I TEB 34 I
10 — D.V 35 I
CC
11 — A.V 36 O
CC
12 O YOUT 37 I
13 O COUT 38 I
14 — A.GND 39 I
15 — D.GND 40 I
16 I AMC 41 I
17 I SMC 42 I
18 I XSG1 43 O
19 O SYNCO 44 O
20 I XV1 45 O
21 I TEST0 46 O
22 O PLLHVEN 47 I
23 O PLLHV 48 —
24 — V (2 V) 49 I
CC
25 — V (3.3 V) 50 —
CC
5-6
PIN PIN
SIGNAL I/O SIGNAL I/O SIGNAL
NO. NO.
GND 51 — VCC (3.3 V) 76 — GND
I4FSC 52 — VCC (2 V) 77 O
TEST1 53 O TGHD 78 O
PLLSC 54 O TGVD 79 O
SCGATE 55 I D9 80 I
FSCO 56 I D8 81 I
FSCI 57 I D7 82 I
EXTSCI 58 I D6 83 I
EXTSYNCI 59 I D5 84 O
EXTVDI 60 I D4 85 O
SO 61 I D3 86 O
SI 62 I D2 87 O
XSCE 63 I D1 88 O
XSCK 64 I D0 89 O
XCLR 65 O CLPOB 90 O
CHARM 66 O ADCK 91 O
CHARB 67 O FLDO 92 I
CGCK 68 O MEMCK 93 I
HDO 69 O MEMCID 94 I
VDO 70 — GND 95 I
VGATE 71 I MCK 96 I
LID 72 — GND 97 I
GND 73 O CO3 98 I
VCK 74 — V (2 V) 99 I
CC
GND 75 — V (3.3 V) 100 — GND
CC
INPUTS
AMC : ATG MODE CONTROL
BUNRI : DAC TEST MODE SELECT (FIXED:L)
CHARB : CHARACTER CONTROL (BACK GROUND)
50
CHARM : CHARACTER CONTROL (CHARACTER)
49
CI0 - CI3 : CHROMA SIGNAL MEMORY INTERFACE
48
D0 - D9 : DIGITAL SIGNAL DATA FROM A/D
47
EXTSCI : EXT BURST
46
: EXT SYNC SIGNAL (COMPOSITE SYNC/HORIZONTAL SYNC)
EXTSYNCI
45
EXTVDI : EXT SYNC SIGNAL (VERTICAL SYNC)
44
FSCI : PLLSC INNER SUB CARRIER
43
I4FSC : 4FSC (FOR SUB CARRIER GENERATOR)
42
LID : LINE DISCRIMINATION SIGNAL
41
MCK : MASTER CLOCK
40
MODE1, MODE2 : DAC TEST MODE SELECT (FIXED: L)
39
: PREBLANKING PULSE
PBLK
38
SI : SERIAL DATA FOR CPU INTERFACE
37
SMC : SCAN MODE SELECT
36
TEB : MEMORY TEST ENABLE (NORMAL:H)
35
TEST1, TEST0 : TEST MODE SET (50k PULL DOWN)
34
TMC1, TMC2 : TEST MODE SET (FIXED: L)
33
VCK/SCK : SG CLOCK (NTSC: 14.318MHz, PAL: 14.1875MHz) /SCAN CLOCK
32
XCLR : SYSTEM RESET
31
XSCE : CHIP SELECT FOR CPU INTERFACE
30
XSCK : SERIAL CLOCK FOR CPU INTERFACE
29
XSG1/SIN : CCD SENSOR ELECTRIC CHARGE READ PULSE/SCAN IN
28
XV1 : CCD VERTICAL REGISTER CLOCK
27
: LUMINANCE SIGNAL MEMORY INTERFACE
YI0 - YI7
26
OUTPUTS
ADCK : CLOCK FOR A/D CONVERTER
CGCK : CLOCK FOR ON SCREEN DISPLAY IC
CLPOB : OPB BLOCK CLAMP PULSE
CO0 - CO3 : CHROMA SIGNAL MEMORY INTERFACE
: CHROMA SIGNAL
COUT
FLDO : FIELD DISCRIMINATION
FSCO : SUB CARRIER
HDO : HORIZONTAL SYNC
MEMCID : COLOR DISCRIMINATION FOR MEMORY INTERFACE
CO2 MEMCK : CLOCK FOR MEMORY INTERFACE
CO1 PLLHVEN : H-PLL/V-PLL PHASE COMPARATOR ENABLE
CO0 PLLHV : H-PLL/V-PLL PHASE COMPARATOR
CI3 PLLSC : PHASE COMPARATOR OUTPUT FOR SUB CARRIER
CI2 SCGATE : SUB CARRIER GATE PULSE
CI1 SO : SERIAL DATA FOR CPU INTERFACE
CI0 SYNCO/SOUT : COMPOSITE SYNC/SCAN OUT
YO7 : HORIZONTAL SYNC SIGNAL OUTPUT FOR TG
TGHD
YO6 TGVD : VERTICAL SYNC SIGNAL OUTPUT FOR TG
YO5 VDO : VERTICAL SYNC
YO4 VGATE : ELECTRICAL ZOOM CONTROL FOR TG
YO3 YO0 - YO7 : LUMINANCE SIGNAL MEMORY INTERFACE
YO2 YOUT : LUMINANCE SIGNAL
YO1
YO0
YI7
YI6
YI5
YI4
YI3
YI2
YI1
YI0
SSC-DC593/DC593P/DC598P (E)