Circuit Descriptions - Sharp LC-32LE631E Service Manual

LC-32LE631
LC-40LE631
LC-46LE631

7. Circuit Descriptions

Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 DC/DC Converters
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.5 Front-End DVB-S(2) reception
7.6 HDMI
7.7 Video and Audio Processing - PNX855xx
Notes:
• Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring-, block- (see chapter
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB
you will find a separate drawing for clarification.
7.1 Introduction
The LE631 chassis uses the PNX855xx chipset. The major
deltas S551 are:
•support of DVB-T2 ("second generation" DVBT).
Hybrid
Tuner
DVB-S2
Tuner
HDMI 1.3
mux
Stdby
3V3
DC/DC
CIRCUIT DESCRIPTIONS
Layouts).Where necessary,
DDR2
4x 128MB -533
32
DVB-S2 (EU)
Ethernet
PHY
1V1
1V8 buffer
2V5
3V3
5V
CI
Figure 7-1 Architecture of TV550 platform 2011
• implementation of "passive" 3D
• removal of TCON from the SSB (comes with the display)
• changed power architecture
7.1.1 Implementation
Key components of this chassis are:
• PNX855xx System-On-Chip (SOC) TV Processor
• TX26xx Hybrid Tuner (DVB-T/C, analogue)
• STV6110AT DVB-S Satellite Tuner
• SII9x87 HDMI Switch
• TPA312xD2PWP Class D Power Amplifier
• LAN8710 Dual Port Gigabit Ethernet media access
controller.
7.1.2 TV550 Architecture Overview
For details about the chassis block diagrams refer to
Block Diagrams. An overview of the TV550 2011 architecture
can be found in
FLASH
512MB
NVM SPI
8kB 64kB
NXP
PNX85500
SOC
AL
USB 3D
SD-CARD
68
Figure 7-1.
LVDS only
Matrix
FHD@120p
FHD@100p
CPLD
CLASS-D
19100_059_110217.eps
chapter 9.
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