Integra DTR-7.6 Service Manual page 113

IC BLOCK DIAGRAMS AND DESCRIPTIONS
SiI9031(HDMI PanelLink Cinema Receiver)
Pin # Pin Name
73 DGND
74 DVCC18
75 IOGND
76 IOVCC
77 MUTEOUT
78 SPDIF
79 CVCC18
80 CGND
81 SD3
82 SD2
83 SD1
84 SD0
85 WS
86 WCK
87 MCLKIN
88 MCLKOUT
89 IOVCC
90 IOGND
91 CGND
92 CVCC18
93 NC
94 AUDPVCC18
95 AUDPGND
96 XTALOUT
97 XTALIN
98 XTALVCC
99 REGVCC
100 NC
101 RSVDL
102 RESET
103 SCDT
104 INT
105 CVCC18
106 CGND
107 CLK48B
108 IOGND
109 IOVCC
110 Q23
111 Q22
112 Q21
113 Q20
114 CVCC18
115 CGND
116 Q19
117 Q18
118 Q17
119 Q16
120 IOGND
121 ODCK
122 IOVCC
123 Q15
124 Q14
125 Q13
126 Q12
127 CGND
128 CVCC18
129 Q11
130 Q10
131 Q9
132 Q8
133 Q7
134 IOVCC
135 IOGND
136 Q6
137 Q5
138 CGND
139 CVCC18
140 Q4
141 Q3
142 Q2
143 Q1
144 Q0
I/O Description
ACR PLL GND
ACR PLL VCC (1.8V)
Input/Output Pin GND
Input/Output Pin VCC (3.3V)
O Mute Audio Output
O S/PDIF Audio Output
Digital Logic VCC (1.8V)
Digital Logic GND
O I2S Serial Data Output
O I2S Serial Data Output
O I2S Serial Data Output
O I2S Serial Data Output
O I2S Word Select Output
O I2S Serial Clock Output
I Audio Master Clock Input Reference
O Audio Master Clock Output
Input/Output Pin VCC (3.3V)
Input/Output Pin GND
Digital Logic GND
Digital Logic VCC (1.8V)
No connect.
ACR PLL VCC (1.8V)
ACR PLL GND
O Crystal Clock Output
I Crystal Clock Input
ACR PLL Crystal Input VCC
ACR PLL Regulator VCC
No connect.
I Reversed, must be tied LOW.
I Reset pin Active Low.
O Indicates active video at HDMI input port.
O Interrupt Output.
Digital Logic VCC (1.8V)
Digital Logic GND
I/O Data Bus latch enable
Input/Output Pin GND
Input/Output Pin VCC (3.3V)
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
Digital Logic VCC (1.8V)
Digital Logic GND
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
Input/Output Pin GND
O Output Data Clock
Input/Output Pin VCC (3.3V)
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
Digital Logic GND
Digital Logic VCC (1.8V)
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
Input/Output Pin VCC (3.3V)
Input/Output Pin GND
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
Digital Logic GND
Digital Logic VCC (1.8V)
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
O 24-bit Output Pixel Data Bus.
DTR-7.6
Use
Ground
Power
Ground
Power
Digital Audio
Digital Audio
Power
Ground
Digital Audio
Digital Audio
Digital Audio
Digital Audio
Digital Audio
Digital Audio
Digital Audio
Digital Audio
Power
Ground
Ground
Power
Configuration/Programming
Power
Ground
Digital Audio
Digital Audio
Power
Power
Configuration/Programming
Configuration/Programming
Configuration/Programming
Configuration/Programming
Configuration/Programming
Power
Ground
Configuration/Programming
Ground
Power
Digital Video
Digital Video
Digital Video
Digital Video
Power
Ground
Digital Video
Digital Video
Digital Video
Digital Video
Ground
Digital Video
Power
Digital Video
Digital Video
Digital Video
Digital Video
Ground
Power
Digital Video
Digital Video
Digital Video
Digital Video
Digital Video
Power
Ground
Digital Video
Digital Video
Ground
Power
Digital Video
Digital Video
Digital Video
Digital Video
Digital Video