Sony CDP-D12 Service Manual page 36

Diode, IC
[DIODE]
2A02
2A02M
[IC]
AK4382AVT-E2 (AKM)
2-CHANNEL AUDIO D/A CONVERTER
—TOP VIEW—
MCLK 1 16 DZFL
BICK 2 15 DZFR
SDTI 3 14 V
CC
LRCK 4 13 GND
PDN 5 12 AOUTL+
CSN 6 11 AOUTL_
CCLK 7 10 AOUTR+
CDTI 8 9 AOUTR_
6
CSN
P DE-EMPHASIS
7 u
CCLK
INTERFACE CONTROL
8
CDTI
4
LRCK
INTERPOLATOR
AUDIO
2
BICK
DATA
INTERFACE
3
SDTI
INTERPOLATOR
CPT-230S-C-TD-BC (SANYO)
EMITTER
3-2
INPUTS
BICK
: AUDIO SERIAL DATA CLOCK
CCLK
: CONTROL DATA
CDTI
: CONTROL DATA IN SERIAL MODE
CSN
: CHIP SELECT
LRCK
: L/R CLOCK
MCLK
: MASTER CLOCK
PDN
: POWER DOWN MODE
SDTI
: AUDIO SERIAL DATA
OUTPUTS
AOUTL+
: L-CHANNEL POSITIVE ANALOG
AOUTL_
: L-CHANNEL NEGATIVE ANALOG
AOUTR+
: R-CHANNEL POSITIVE ANALOG
AOUTR_
: R-CHANNEL NEGATIVE ANALOG
DZFL
: L-CHANNEL DATA ZERO DETECT
DZFR
: R-CHANNEL DATA ZERO DETECT
MCLK
1
CLOCK
DIVIDER
12
∆Σ
8X
SCF
11
MODULATOR
10
∆Σ
8X
SCF
9
MODULATOR
BR9040F-WE2 (ROHM)
4 K (256 x 16)-BIT EEPROM
—TOP VIEW—
B
R/ 1
OUT
V 2
CC
CS
3
IN
SK
4
IN
INPUTS
CS
: CHIP SELECT
DI : OPERATING CODE, ADDRESS, AND SREIAL DATA
SK
: SERIAL DATA CLOCK
WC
: WRITE CONTROL
OUTPUTS
DO : SERIAL DATA
B BUSY
R/ : READY/
3
CS
COMMAND CODE
CONTROL
CLOCK GENERATION
4
SK
5 COMMAND
DI
REGISTER
6
DO
ICS541MT (ICS)
AOUTL+
AOUTL_
PLL CLOCK DIVIDER
—TOP VIEW—
AOUTR+
AOUTR_
ICLK 1
V 2
CC
GND 3
S0 4
INPUTS
OE : OUTPUT ENABLE
ICLK : CLOCK
S0, S1 : SELECT FOR OUTPUT CLOCK
OUTPUTS
CLK, CLK/2 : CLOCK
4
S0
DIVIDER
5
S1
SELECTION
1
ICLK
CIRCUITRY
WC
8
IN
7 GND
6 DO
OUT
5
DI IN
STATUS SIGNAL
1
8
POWER SUUPLY
VOLTAGE DETECTOR
WRITE HIGH VOLTAGE
DISABLE GENERATOR
ADDRESS ADDRESS
8
8
BUFFER DECODER
4,096-BIT
EEPROM
ARRAY
DATA R/W
16
16
REGISTER AMPLIFIER
8 CLK
7 CLK/2
6 OE
5 S1
8
CLK
AND /2
7
CLK/2
B
R/
WC
CDP-D12