Block Diagram - Main Section - Sony PEGA-CC5 Service Manual

4-2. BLOCK DIAGRAM – MAIN Section –
UNREG_OUT,
TXDA, RXDA,
IO0, IO1 UNREG_OUT
B
(Page 30) 50 UNREG_OUT
TXDA
55 TXD
RXDA
54
RXD
IO0
108 IO0
IO1
103 IO1
SIBDIN, SIBDO, SIBSCK,
SIBSYN, SIBIRQ,
BRESET, DF100 SIBDIN
(Page 30) C
41 SIBDIN
SIBDO
42 SIBDOUT
SIBSCK
39 SIBSCLK
SIBSYN
40 SIBSYNC
SIBIRQ
44
SIBIRQ
BRESET
63 RXPWR
DF100
93 DF
LED DRIVE POWER
D910
105
Q904 LED1
(POWER)
205 204
DCLK, WE
DCLK
(Page 30) E
WE
38
CPU
IC13
D16 – D31 D0 – D15
16, 18, 19, 21, 23, 24, 26, 145, 142, 141, 139, 138, 136, 134, 133,
169 208 207 202 199 197 194 192
27, 2, 4, 5, 7, 9, 11, 12, 14 159, 157, 155, 153, 152, 150, 148, 146
A0 – A12
2, 4, 5, 7, 8, 10, 11, 13, 42,
16 39 15 37 17 20 18 19 21-26, 29-35
44, 45, 47, 48, 50, 51, 53
A0 – A9, A10/AP,
DQ0 – DQ15
A11, BS1
SD-RAM
IC26
BD0 – BD15
(Page 30) J
FLRMDE, FLRMDIR, FLRMAE,
FLRMCS, FLRMRD, FLRMWE
F
(Page 30)
IO2
INT0 65
IO3
INT1 64
IO4
INT2 56
IO5
IO5 47
IO6
IO6 46
ONBUTN
ONBUTN 86
PON
PON 87
SYSCLK
SYSCLKIN 128
CS0
CS0 162
CS1
CS1 126
RD
RD 163
ALE
ALE 168
X1
C32KIN 79
32.768kHz
A0 – A12
A5V_ON
189, 188, 186, 185, 183, 181, 180,
37
178, 177, 175, 174, 172, 171
A0 – A12
ADDRESS BUS ADDRESS BUS
A1 – A12 A1 – A12
FLRMDE OE
DATA
BUFFER
FLRMDIR DIR
IC35, 36
1OE,
ADDRESS ADDRESS
2OE
FLRMAE OE
BUFFER
IC31, 32 IC33, 34
BD0 – BD15
DATA BUS
BA1 – BA12 BA13 – BA21
BD0 – BD15
29-36, 38-45 25-18, 8-5
17-15, 10, 9
DQ0 – DQ14, DQ15/A1 A0 – A11
A12 – A21
FLRMCS
26 CE
64Mbit
FLRMRD
28 OE
FLASH MEMORY
FLRMWE
11 IC40
WE
XRESET
FM_ON
XRESET, FM_ON,
CHARGE CONT CHARGE CONT
D
(Page 30)
UNREG,
DC+B, CHARGE
A
(Page 30)
31 31
IO2 – IO6
G
(Page 30)
ONBUTN, PON, SYSCLK,
CS0, CS1, RD, ALE
H
(Page 30)
A0 – A12
K
(Page 30)
LE
LATCH
BA22
LEVEL SHIFT
IC42
D5
4-1, 48, B3.3V
D6
CLIE5.2V
12
+3.3V
D3.3V,
REGULATOR
GPS3.3V
IC6
RESET SIGNAL
GENERATOR
IC1
+3.3V
A3.3V REGULATOR
IC5
B+ SWITCH
FM+5V
Q501, 502
+5V
A5.0V
REGULATOR
IC3
DC+B B+ SWITCH
Q906, 907
CHARGE
CHARGE SWITCH
Q901, 902
UNREG
PEGA-CC5
BAT1
CR2450
CN1
DC 5.2V
1
5.2V
CAR BATTERY
ADAPTER
D7
3
UNREG