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Philips Semiconductors
IC card interface
A
CTIVATION SEQUENCE
From Idle mode, the circuit enters the activation mode
when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
executed. When RST is enabled it becomes the inverse of
RSTIN.
Figures 10 to 12 illustrate the activation sequence as
follows:
1. Step-up converter is started (t
handbook, full pagewidth
OSC_INT/64
CMDVCC
VUP
V CC
I/O
CLK
RSTIN
RST
1999 Oct 12
t
)
1
0
t act
t 0
t 1
t 2
t 3
LOW
Fig.10 Activation sequence using RSTIN and CMDVCC.
2. V
rises from 0 to 3 or 5 V (t
CC
to the state on pin CV/TV)
3. I/O, AUX1 and AUX2 are enabled and CLK is enabled
(t
= t
+ 4T); I/O, AUX1 and AUX2 were forced LOW
3
1
until this time
4. CLK is set by setting RSTIN to HIGH (t
5. RST is enabled (t
further action on CLK, but is only controlling RST.
The value of V
(5 or 3 V) must be selected by the level
CC
on pin CV/TV before the activation sequence.
t 5
t 4
12
Product specification
TDA8002C
1
= t
+ 1
T) (according
2
1
2
)
4
= t
+ 7T); after t
, RSTIN has no
5
1
5
T = 25 s
FCE273
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