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M 2 3500
4) Graphic VRAM memory (MZIR03)
• Block Diagram
t+r-
1
CSP-8
D14
CAS-2
R A M ' . F I
R A M C K )
M
1
1
Ir—
RAM(D)
RAW(C)
1 1
|
R A M ( B )
RAM(A)
i n
P-S
QH
T
\[
SL
I'-S
A8-15
AO—7
1. read/write Mode
The select signal RASA, RASB and RASC are generate from
RAS, A14 and A1 5 which is signal of GDC-2.
The address is allocated to each area selected by above signal.
Read/write by Z-80 via the GDC
(1) 640 x 200 dots display mode
Option l
#BFFF
(48K byte)
8bit structure
# 8 0 0 0
#4000
#0000
Low
byte
G
B
High
byte
-
__
i
R
i
16K
RASA = RAS • A14 • A15 . .
RASB= RAS • A14 • A15 .
RASC =• RAS • A14 • A15 . .
. . . 0 0 0 0 ~ 3FFF
. . . 4000 ~ 7 F F F
. . 8000 ~ BFFF
2. Display mode
A14 and A15 are not valid and RASA, RASB. RASC are selected
together. By the DBIN signal from GDC-2. 08/16 signal is gener-
ated by CSP-2.
The signal of 08/16 Select, after P-5 conversion for RAMA,
R AM B Output signal then Output to V B by Serial signal, or sprit
the signal to VB and VR.
(08/16 Select: 08 for 200 rasters. 16 for 400 rasters)
During displaying
B/W:
3 frames
Color: 1 frame
# 3 K F F
# 0 0 0 0
8bit
16 K
i t
8 b i i
8bit
8bit
Option ll
# B K F K
(96K byte)
16bit structure
#8000
#4000
*0000
G
16K
# 3 F F F
#0000
B/W:
6 frames
Color: 2 frames
i
16bit
16bit
]fiK
16bil
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