Download Print this page

Yamaha QL5 Service Manual page 303

Digital
Hide thumbs Also See for QL5:

Advertisement

H
G
BLOCK DIAGRAM 003 (QL5/QL1)
CPUQL
+3.3D
IC103(5P)
RESET
(3.0V)
BT501
USB
IC203(5P)
+5D
USB
Power
Switch
IC201
(48P)
+3.3D
USB
USB
Hub
DS
US
CN203
Xtal
12MHz
X201
+3.3D
RESET
(2.9V)
DC-DC
CN301(180P)
CN103
CN101(180P)
DSP32
QL5
(5P)
DSP16
QL1
See page 4
28CA1-2001135745-3
F
E
+3.3D
IC205(56P)
+3.3D
FlashROM
2 MAC Addresses inside
512Mbit
(MAC Address Inside)
6 1
t i b
CPU Bus
Wired OR
+1.8D
IC301, 302
/SYSRES
IC104(8P)
DDR2-SDRAM
1Gbit x2
+3.3D
+3.3D
+1.8D
+1.2D
IC503(5P)
+3.3B
Battery Backup
& Check
PORT
(Comparator, Diode, FET)
D501, D502, FT501, FT510
+3.3B
CPU
IC502
RTC
I2C
SH7724
(10P)
Xtal
IC101
32.768KHz
CPU Core :
489.6MHz
X501
+3.3D
DDR2-SDRAM :
163.2MHz
X404
BUS :
81.6MHz
OSC
+3.3D
50MHz
RMII
10/100Base
PHY
PORT
USB
FSI
SPI
IC402
(33P)
IC106(5P)
+1.2D
+1.8D
IC105(25P)
Ethernet
/RES_IN
PORT
USB
TDM
Fs, 64Fs
SPI
(Editor)
(2ch/line)
(Master Clock)
IN :
CAUTIONS(DCMS), ...
OUT :
PORT RESETS, ...
D
C
+3.3D
CPLD
+3.3D
IC202(100P)
IC204(44P)
IC203(20P)
Address Decode
Wait Control
MRAM
E-Bus
E-Bus BUSY
1Mbit
Controller
IRQ OR
6 1
t i b
8bit
8bit
32bit
+3.3D
X101
OSC
27.2MHz
OSC
48MHz
X401
+3.3D
+3.3D
CKO
BUFFER
IC201(8P)
/WAIT
IRQ
PORT
LCDC
IRQ
I2C
SCI
IC602-607
+3.3D
(20P)
16bit
I2C
SCI x3
IRQ x5
CKO
/IRQ_MY x3
A[1:24]
LCDDON
/WAIT
D[0:15]
CPU Bus
B
LCD module
CN402
with
(20P)
LVDS Tx
Touch Panel
IC401(48P)
+3.3L
CN1(20P)
LCDC
CN101
+24D
+5D
(6P)
DC-DC
+12D
+12D
+5D
LED(BL)
Driver
CPU
M38039
+5D
PORT
PORT
Touch Panel
SCI
AD
Position Detect
PORT
(Tr. x5, AND x2)
CERALOCK
16MHz
DCM
CN102
/SYSRES
E-Bus
(6P)
CPU, LCDC, USB, 10.4" LCD
BLOCK DIAGRAM 003 (QL5/QL1)
A
QL5/QL1
1
2
3
CN151(6P)
CN102(5P),
+24D
CN150(4P)
4
CN101
(9P)
See page 9
5
CN281(4P)
6
5

Advertisement

Chapters

loading

This manual is also suitable for:

Ql1