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HCD-FX888K
QQ
3 7 63 1515 0
Pin No.
Pin Name
49
WMD0
50
PAGE2
51
VSS
52, 53
PAGE1, PAGE0
54
BOOT
55
TST1
56
BST
57
MOD1
58
MOD0
59
EXLOCK
60
VDDI
61
VSS
62, 63
A17, A16
64 to 66
A15 to A13
67
GP10
68
GP9
69
GP8
70
VDDI
71
VSS
TE
72 to 75
D15 to D12
L 13942296513
76
VDDE
77 to 80
D11 to D8
81
VSS
82 to 85
A9, A12 to A10
86
TDO
87
TMS
88
XTRST
89
TCK
90
TDI
91
VSS
92 to 97
A8 to A3
98, 99
D7, D6
100
VDDI
101
VSS
102 to 105
D5 to D2
106
VDDE
107, 108
D1, D0
109, 110
A2, A1
111
VSS
112
A0
113
PM
www
114, 115
SDI3, SDI4
116
SYNC
117
TST2
.
118
GP11
119
TST3
120
VDDI
62
http://www.xiaoyu163.com
I/O
I
External memory wait mode setting terminal (fixed at "H" in this set)
O
External memory page selection signal output terminal (not used)
—
Ground terminal
O
External memory page selection signal output terminal (not used)
I
Boot mode control signal input terminal (not used)
O
Not used
I
Boot strap signal input from the system controller
Operation mode setting terminal "L": enhanced mode, "H": normal mode
I
(fixed at "H" in this set)
Operation mode setting terminal "L": single chip mode, "H": can not use
I
(fixed at "L" in this set)
I
PLL lock error signal and data error flag input from the digital audio interface
—
Power supply terminal (+2.5V)
—
Ground terminal
O
Address signal output terminal (not used)
O
Address signal output to the S-RAM
I
L/R sampling clock signal input terminal
O
Read ready signal output to the system controller
I
Channel status bit 1 input from the digital audio interface receiver
—
Power supply terminal (+2.5V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the S-RAM
—
Ground terminal
O
Address signal output to the S-RAM
O
Simplicity emulation data output terminal (not used)
I
Simplicity emulation data input start and end terminal (not used)
I
Simplicity emulation non-sync break signal input terminal (not used)
I
Simplicity emulation clock signal input terminal (not used)
I
Simplicity emulation data input terminal (not used)
—
Ground terminal
O
Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
—
Power supply terminal (+2.5V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the S-RAM
O
Address signal output to the S-RAM
—
Ground terminal
O
Address signal output to the S-RAM
I
PLL initialize signal input from the system controller
I
Audio serial data input terminal
x
ao
u163
I
Sync/non-sync setting terminal "L": sync, "H": non-sync (fixed at "H" in this set)
y
I
Not used
i
I
(not used)
I
(not used)
—
Power supply terminal (+2.5V)
http://www.xiaoyu163.com
2 9
8
Description
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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