Dvd Mechanism; Specifications - Clarion VRX848RVD Service Manual

SPECIFICATIONS

Dimensions(mm): 139(W)x15(H)x126(D)
Weight: Approx. 330g
CAUTIONS
* DVD mechanism is used the special adjustment jig for
repair.
* DVD mechanism is using System Controller IC which
can rewrite a mechanism's application software.
As for Flash Memory(IC303 : 658-0237-07) and mecha-
nism which are exchanged for repair, a mechanism's
application software is not written in.
It is necessary to write in a mechanism's application soft-
ware after repair.
It writes in writing by the exclusive disc.
(Mechanism application Ver. 152 or later.)
EXPLANATION OF IC
658-0237-05 MN102H60GAC
1.Terminal Description
pin 1: WAITODC : IN : CPU Bus Control
pin 2: NRE : O : CPU Bus Control
pin 3: NWEL : O : CPU Bus Control
pin 4: (NC) : - : -
pin 5: XCS0 : O : Flash ROM Chip Select
pin 6: NSRAMCS : O : SRAM Chip Select
pin 7: NCS : O : ODC Chip Select
pin 8: NMPEGCS : O : MPEG Decoder Chip Select
pin 9: NMPEGRST : O : MPEG Decoder Reset
pin 10: NCSDAC : O : DAC Chip Select
pin 11: (NC) : - : -
pin 12: P57/XWORD : IN : Low Fix
pin 13: A0 : O : CPU Address Bus
pin 14: A1 : O : CPU Address Bus
pin 15: A2 : O : CPU Address Bus
pin 16: A3 : O : CPU Address Bus
pin 17: 33VDD : O : +3.3V Power Supply
pin 18: (NC) : - : -
pin 19: VSS : - : GND
pin 20: XI/PS1 : IN : Self Test Mode
pin 21: (NC) : - : -
Clarion Co., Ltd.
50 Kamitoda, Toda-shi, Saitama 335-8511 Japan
Service Dept.: 5-66 Azuma , Kitamoto-shi, Saitama 364-0007 Japan
Tel: +81-48-541-2335 / 2432 FAX: +81-48-541-2703
Service Manual
System Controller
- M1 -
For QC-6820E-A / QC-6820K-C

DVD mechanism

929-2501-04
Model
pin 22: 33VDD : - : +3.3V Power Supply
pin 23: OSCI : IN : Clock
pin 24: (NC) : - : -
pin 25: MODE : IN : Mode Selector
pin 26: A4 : O : CPU Address Bus
pin 27: A5 : O : CPU Address Bus
pin 28: A6 : O : CPU Address Bus
pin 29: A7 : O : CPU Address Bus
pin 30: A8 : O : CPU Address Bus
pin 31: A9 : O : CPU Address Bus
pin 32: A10 : O : CPU Address Bus
pin 33: A11 : O : CPU Address Bus
pin 34: 33VDD : - : +3.3V power Supply
pin 35: A12 : O : CPU Address Bus
pin 36: A13 : O : CPU Address Bus
pin 37: A14 : O : CPU Address Bus
pin 38: A15 : O : CPU Address Bus
pin 39: A16 : O : CPU Address Bus
pin 40: A17 : O : CPU Address Bus
pin 41: A18 : O : Reserve for DVD3.5 CPU Address Bus
pin 42: A19 : O : Reserve for DVD3.6 CPU Address Bus
pin 43: VREFN : - : (Low Level Fixed)
pin 44: INNERSW : IN : Inner Switch
pin 45: LOADING : O : Loading Driver Command Value
pin 46: (NC) : - : -
pin 47: GND : - : Ground
pin 48: NGENCS : O : Serial Bus Chip Select Clock Generator
pin 49: NCE2SRAM : O : SRAM Standby Control
pin 50: CKIO : O : MPEG DecoderCKIO
pin 51: SI DATA : IN : Serial Bus SI Data
pin 52: SO DATA : O : Serial Bus SO Data
pin 53: GENCK : O : Serial I/F Clock Generator SCK
pin 54: VREFP : - : VREFP
pin 55: STANDBY : O : Motor Driver Mute
pin 56: GENDATA : O : Serial I/F Clock Generator SO
pin 57: ODCSEL : : ODC IF Select O
pin 58: DMUTE : O : Audio Mute (H: ON, L: OFF)
pin 59: LODSWON : O : Photo Enable
pin 60: LODSW : IN : LOADING SW
pin 61: VSS : - : GND
pin 62: P3 : IN : Photo SW (H: Close)
pin 63: P2 : IN : Photo SW (H: Close)
pin 64: P1 : IN : Photo SW (H: Close)
pin 65: (NC) : - : -
pin 66: 33VDD : - : +3.3V Power Supply
pin 67: S5 : O : DAC Reset Control
pin 68: S3 : O : DAC Chip Select
pin 69: (NC) : - : -
pin 70: S0 : O : DAC Data Shist Clock
Published by Service Dept.
Nov.2004
Printed in Japan
929-2501-04