Ic Pin Function Descriptions - Sony AVD-S10 Service Manual

Super audio cd/dvd receiver
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5-28. IC Pin Function Descriptions

• IC103
MB91307APFV-G-BND-E1 (System Control) (DVD Board)
Pin No.
Pin Name
1 to 5
HA17 - 21
6
HA22
7
WP
8
TRM/XKRCS
9
AVCC
10
AVRH
11
AVSS
12
AN0
13
AN1
14
AN2
15
AN3
16
INT0
17
INT1
18
INT2
19
INT3
20
INT4
21
INT5
22
INT6
23
INT7
24
VCC
25
SI0
TE
L 13942296513
26
SO0
27
SC0
28
SI1
29
SO1
30
SC1
31
SI2
32
SO2
33
SC2
34
VSS
35
XRST
36
XARPRST
37
RGBSEL/MICMUTE
38
SDA
39
SCL
40
TRM+/XKRRST
41
EUROV/Y/CLPSW1
42
DISCEXT/CLPSW0
43
MD0
44
MD1
45
MD2
46
DREQ0
47
DACK0
48
XDRVMUTE
www
49
DREQ1
50
DACK1
51
XIFCS
.
52
VSS
53
X1
54
X0
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I/O
O
Address signal output
O
Address signal output (not used)
O
I2C EEPROM write protect signal output
O
Chip select signal output to IC801(CXD2752R)
Analog power supply
A/D converter reference voltage supply
Analog ground
I
Region setting input
I
Model setting input
I
Destination setting input
I
Not used (pull-up)
I
Interrupt signal input from IC503(AV Decoder)
I
Interrupt signal input from IC302(CXD9635R/ARP)
I
Interrupt signal input from IC302(CXD9635R/SDSP)
I
FGA interrupt signal input
I
Interrupt signal input from IC901(CPU)
I
Interrupt signal input from IC801(CXD2752R)
O
Soft mute control signal output to IC801(CXD2752R)
Not used
Power supply
I
Serial data input from IC901(CPU)
O
Serial data output to IC901(CPU)
O
Serial clock output to IC901(CPU)
I
Serial data input from IC801(CXD2752R)
O
Serial data output to IC801(CXD2752R)
O
Serial clock output to IC801(CXD2752R)
I
RS-232C data input for debugging
O
RS-232C data output for debugging
O
RS-232C clock input or output for debugging
Ground
O
System reset signal output
O
Reset signal output to IC302(CXD9635R/ARP)
Not used
I/O
I2C data input or output
O
I2C clock output
O
Data request selection signal output (DVD : L, SACD : H)
Not used
Not used
Operation mode setting (connected to Vcc)
Operation mode setting (connected to Ground)
Operation mode setting (connected to Ground)
I
DMA-REQ1 signal input
O
DMA-ACK1 signal output
O
Drive mute control signal output to IC401
I
DMA-REQ0 signal input
x
ao
u163
y
O
DMA-ACK0 signal output
O
Chip select signal output to IC901(CPU)
i
Ground
Clock (oscillator) output
Clock (oscillator) input
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2 9
8
Description
Q Q
3
6 7
1 3
1 5
co
.
AVD-S10
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
59

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