Standard Reserved Memory Locations - Xerox Alto I Hardware Manual

A personal computer system alto series
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Alto Hardware Manual
APPENDIX B· STANDARD RESERVED MEMORY LOCATIONS
All numbers are in octal.
Location
Page 0:
0-17
Page 1:
400-412
420
421
422
423
424
425.
426
427
430
431-450
452
453
457
460-477
500
501-517
521
522
523
524
525
527
530-567
570-577
600
601
602
603
604
605
606
607
610
611-612
613
614
615
616
617
620
621
DASTART
ITQUAN
ITBITS
MOUSEX
MOUSEY
CURSORX
CURSORY
RTC
CURMAP
WW
ACTIVE
MASKTAB
PCLOC
INTVEC
KBLK
KSTAT
KADDR
ITTIME
TRAPPC
TRAPVEC
EPLOC
EBLOC
EELOC
ELLOC
EICLOC
EIPLOC
EOCLOC
EOPLOC
EHLOC
DCBR
KNMAR
DWA
CBA
PC
SAD
Contents
Set to 77400B by OS (Swat)
Used by standard bootstrap operation
Display list header (Std. Microcode)
Display vertical field interrupt bitword (Std. Microcode)
Interval timer stored quantity (Std. Microcode)
Interval timer bitword (Std. MIcrocode)
Mouse X coordinate IStd. Microcodel
Mouse Y coordinate Std. Microcode
Cursor
X
coordinate Std. Microcode
Cursor Y coordinate Std. Microcode
Real Time Clock (Std. Microcode)
Cursor bitmap (Std. Microcode)
Interru:pt wakeups
waitin~(Std.
Microcode)
Active mterrupt bitword Std. Microcode)
Zero (Extension of MAS TAB by convention; set by OS)
Mask table for convert (Std. Microcode; set by OS)
Saved interrupt PC (Std. Microcode)
Interrupt Transfer Vector (Std. Microcode)
Disk command block address (Std. Microcode)
Disk status at start of current sector (Std. Microcode)
Disk address of latest disk command (Std. Microcode)
Sector interrupt bit mask (Std. Microcode)
Interval timer time (Std. Microcode)
Trap saved PC (Std. Microcode)
Trap vector (Std. Microcode)
Timer data (OS)
Ethernet post location (Std. Microcode)
Ethernet mterrupt bit mask (Std. Microcode)
Ethernet ending count (Std. Microcode).
Ethernet load. location (Std. Microcode)
Ethernet input buffer
coun~
(Std. Microcode)
Ethernet input buffer poinier (Std. Microcode)
Ethernet output buffer count (Std. Microcode)
Ethernet output buffer pointer (Std. Microcode)
Ethernet host address (Std. Microcode)
Reserved for Ethernet expansion (Std. Microcode)
Alto IIII indication that microcode
can
interrogate (O=Alto I, -l=Alto II)
Posted by parity task when a main memory parity error is detected.
:: (Std. Microcode)
(Note:
Disk
and Ethernet bootstrap loaders run in 622-777.)
700-707
Saved registers (Swat)
Page 376B:
177016-177017
177020-177023
177024
177025
177026
177030-177033
177034-177037
Page 377B:
177740-177757
UTILOUT
XBUS
MEAR
MESR
MECR
UTIUN
KBDAD
Printer output (Std. Hardware)
Utility input bus (Alto II Std. Hardware)
.
Memory Error Address Register (Alto
If
Std. Hardware)
Memory error status register (Alto II Std. Hardware)
Memory error control register (Alto II Std. Hardware)
Printer status, mouse, keyset (all 4 locations return same thing)
Undecoded keyboard (Std. Hardware) .
.
BANKREGS
Extended memory option bank registers -- see section 2.3
68

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