3.
After receipt of the LGO_U1 from the downstream port, Examiner transmits an LAU at
[PM_LC_TIMER – tLinkTurnAround], i.e., at 2.5us after the LGO_U1.
The value of PM_LC_TIMER deadline is 3us. The value of tLinkTurnAround
is 500ns.
details.
The test fails if the PUT does not send LPMA after receiving the LAU.
4.
Examiner and the PUT exchange U1 Exit LFPS and transition back to U0
At this point, Examiner will reject subsequent LGO_U1 requests from the
PUT with LXU.
5.
After Examiner completes this test case, clear the U1/U2 registers through the CV prompt.
Specification Reference
Section 7.2.4.1#1,2
7.21 PM_LC_TIMER Timeout Test (Downstream Port
Only)
Test Summary
This test verifies that the PUT transitions to Recovery when the PM_LC_TIMER elapses.
Test Steps and Expected Results
1.
Examiner performs steps 1 to 3 of 7.18 (Low Power Initiation for U1 Test - Downstream
Port Only).
2.
Examiner does not transmit LAU when it receives the LGO_U1.
The value of PM_LC_TIMER deadline is 3us, but is given a "calculated test
time" expiration of 5.0225us.
USB 3.0 Link Layer Test Specification, Section 4.
document for details.
72 of 124 |
Link Layer Tests
See Section 4 of the Link Layer Test Specification for more
This calculated test time is defined in the
Please refer to that
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