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USB Explorer 280 Examiner Compliance Test Suite User Manual Version 1.03 January 18, 2013...
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Ellisys shall not be liable for any errors contained herein, or for incidental or consequential damages in connection with the furnishing, performance or use of this material.
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USB 3.0 Link Layer Test Specification October 26, 2011 USB 3.0 Specification November 12, 2008 USB 3.0 Errata June 9, 2010 Ellisys Contact Details Ellisys Phone +41 22 777 77 89 Chemin du Grand-Puits 38 +41 22 777 77 90...
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CREATE A SITUATION IN WHICH PERSONAL INJURY OR DEATH IS equivalent to new. If Ellisys is unable to repair or replace the product, it LIKELY TO OCCUR. ELLISYS SHALL NOT BE LIABLE FOR THE DEATH OF...
Setup for Link Layer, Device Framework, Electrical, and Mass Storage Testing ... 26 Setup for Chapter 10 Hub Testing ..............29 Using USB30CV ..................31 USB Explorer 280 Front Panel Overview ............33 Explorer 280 Back Panel Overview ..............35 User Interface Reference ............38 Tests Tab ....................
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Link Layer Tests ................50 Link Bring-Up Test ..................50 Link Command Framing Test ................ 53 Link Command CRC Test ................53 Invalid Link Command Test ................54 Header Packet Framing Test ................ 55 Data Payload Framing Test ................55 RX Header Packet Retransmission Test ............
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Serial Number Test ..................89 Class-Specific Request Test ................. 90 Error Recovery Test ..................91 Case 1 Test ....................93 Case 2 Test ....................94 Case 3 Test ....................95 Case 4 Test ....................96 Case 5 Test ....................97 8.10 Case 6 Test ....................
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10. Hub Tests ..................124 8 of 124...
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Figure 3-5 Test Setup for Hub Chapter 10 Tests ............29 Figure 3-6 Test Setup for Hub Chapter 10 Tests (Without Analyzers) ......30 Figure 3-7 USB Explorer 280 Front Panel ..............33 Figure 3-8 USB Explorer 280 Back Panel ..............36 Figure 4-1 Examiner Application - Tests Tab ............
A tip symbol- tells you information that will help you carry out a procedure. Where to Find More Help Go to the Ellisys website and the following pages for the latest information: Ellisys products page - Go to for the latest product information and documentation.
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Terms and Abbreviations Term/Abbreviation Definition CV Test Driver The driver running on the host controller, provided by USB-IF. This driver has a known behavior in order to run certain tests described in this document. Link Verification The EX280 hardware and application aimed at System running the tests on an Upstream or a Downstream Port Under Test.
Examiner Overview Introduction The Ellisys Examiner™ Compliance Test Suite is a stand-alone application that is used to verify proper operation of a USB 3.0 host, hub, or device, based on requirements as set forth in the USB 3.0 specification and other relevant documents as provided by the USB Implementers Forum (USB-IF).
The Examiner application uses an enabled USB Explorer 280 system to emulate a host when testing a device (or hub upstream port), or to emulate a device when testing a host (or hub downstream port). For Chapter 10 testing, two enabled EX280s are used to emulate US and DS ports of the hub under test (HUT).
EX280 Duo). Examiner is an optional feature and must be specifically enabled on the EX280 hardware. For information on updating an Explorer 280 to include the Examiner functionality, please contact Ellisys. 14 of 124 | Examiner Overview...
1.2 Main Features and Areas of Test Coverage Examiner includes the features and capabilities listed below. Successful completion of Chapter 6/7 tests (commonly referred to as “Link Layer Tests”) and Chapter 10 tests for hubs are required for certification by USB-IF. Click here for details from the USB Implementer’s Forum (USB-IF).
1280 x 1024 screen display resolution with 65,536 colors, or better. USB 2.0 EHCI Host Controller. Examiner requires several software components. Ellisys recommends that you visit the following web pages as needed, to update your versions of Microsoft .NET Framework and Windows: www.microsoft.com/net...
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The Examiner Setup Wizard screen appears: If the Examiner Setup Wizard does not appear automatically, navigate to the location of the EllisysUSB30Examiner installer file through the Windows directory and launch the installer directly. Read the WARNING note and click on Next. Installing the Application | 17 of 124...
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The License Agreement screen appears: Read the License Agreement carefully, and then select I Agree. Click on Next. The Select Installation Folder screen appears. 18 of 124 | Installing the Application...
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The default installation folder appears in the Folder field. Ellisys recommends that you use the default folder, however if you wish to change this folder, click on Browse and navigate to the folder required. Select whether anyone or only the user currently logged on can access the software by selecting either Everyone or Just me.
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An Installation Progress screen appears: When the software has been installed, the Installation Complete screen appears: Click on Close. The Ellisys USB Explorer 280 Examiner application is now installed. 20 of 124 | Installing the Application...
USB driver. 2.3 Connecting to the Control Computer Examiner, and the USB Explorer 280 Analyzer that may optionally be used in the Examiner setup (see Figure 3-2 and Figure 3-3), are controlled over a high-speed USB 2.0 connection by a PC hosting the Examiner application, enabling the use of any notebook or desktop computer.
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The Hardware Update Wizard opens: Select No, not this time. Click on Next. The Found New Hardware Wizard appears: Select Install the software automatically (Recommended). 22 of 124 | Installing the Application...
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10. Click on Next. The Please wait while the wizard installs the software window appears: Windows installs the driver. 11. When the installation is complete, the wizard has finished installing the software screen appears: 12. Click on Finish. Installing the Application | 23 of 124...
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The installation is complete. 24 of 124 | Installing the Application...
Hardware Setup and Configurations Examiner uses the USB Explorer 280 Analyzer/Generator in a traffic generation mode to automatically execute compliance testing against the port under test (PUT). Optionally, an Explorer 280 Analyzer may be used, under automated control of the Examiner application (or manually operated under the EX280 Analyzer application), to capture traffic that occurs during each test that is executed.
To set up Examiner to test a device (or hub upstream port): Connect as shown in the figure below, connecting a USB 2.0 cable from the Control Computer hosting the Examiner application to the rear control port of the USB Explorer 280 that will execute the Examiner’s tests.
To set up Examiner to test a host: Connect as shown in the figure below, connecting a USB 2.0 cable from the Control Computer hosting the Examiner application to the rear control port of the USB Explorer 280 that will execute the Examiner’s tests.
To set up Examiner to test a hub downstream-facing port: For testing of a Hub downstream-facing port (DFP), the upstream-facing port of the hub must be connected to a host system that has USB30CV installed. Connect as shown in the figure below.
3.2 Setup for Chapter 10 Hub Testing To set up Examiner to test a hub: Connect as shown in Figure 3-5 Test Setup for Hub Chapter 10 Tests or Figure 3-6 Test Setup for Hub Chapter 10 Tests (Without Analyzers) below, connecting a USB 2.0 cable from the Control Computer hosting the Examiner application to the rear control ports of both USB Explorer 280’s that will execute the Examiner’s tests (US and DS).
3.3 Using USB30CV If testing a hub downstream-facing port (DFP), the upstream port of the hub must be connected to a host system with USB30CV installed. USB30CV is an application provided by the USB-IF (www.usb.org) that is used for link layer and hub testing, as well as other compliance test areas outside the scope of this document.
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2. Launch USB30CV on the host system under test, or the host system attached to the upstream-facing port of the hub under test, as applicable. 3. In USB30CV, select Link Layer Testing from the Select Test Suite box. 4. Click Run on the USB30CV application. The USB30CV advances to the first test to be supported (TD 7.06) and presents a message such as shown below: At this point, the user will execute the selected Examiner tests (in the Examiner application)
All tests requiring USB30CV are populated in Examiner’s Test List. Tests not requiring the use of USB30CV are not available. 3.4 USB Explorer 280 Front Panel Overview The front panel of the USB Explorer 280 is shown below: Figure 3-7 USB Explorer 280 Front Panel Hardware Setup and Configurations...
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Upstream Connector The Upstream Connector is used in by Examiner when testing a host or hub downstream port. Downstream Connector The Downstream Connector is used by Examiner when testing a device or hub upstream port. Power LED The Power LED indicates if the unit is correctly powered from the supplied 24VDC/2A power adapter and connected to the control computer.
The Transmit LED indicates if payload (Data Packets) is transmitted on a given port. Off: No data sent. Flashing green: Data Packet sent. 3.5 Explorer 280 Back Panel Overview The back panel of the USB Explorer 280 is shown below: Hardware Setup and Configurations | 35 of 124...
Figure 3-8 USB Explorer 280 Back Panel Caution - When connecting the USB cable DO NOT force the connector into the unit. The metal part of the connector should not be inserted completely into the connection port. Forcing the connector or inserting all of the metal part of the connector will break the port connection and is not covered by the warranty.
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Auxiliary Equipment Reserved for future extensions. Inter-equipment Reserved for future extensions. Hardware Setup and Configurations | 37 of 124...
User Interface Reference The Examiner user interface consists of three tabs (Tests, Results, and Settings) for test selection, test results, and environmental settings. Each tab displays specific information and/or allows the user to interact with the software for a given task. 4.1 Tests Tab On the left, shows tests available and selected.
4.2 Results Tab Shows a running tally of all tests conducted, including pass/fail indications, a count of tests run, failed, and not completed, supplementary results information, and access to the HTML summary report. Access to the HTML summary report becomes available once all selected tests are finished.
Figure 4-3 Examiner Application - Settings Tab In some cases, the user may prefer to capture activity between Examiner and the PUT using an EX280A analyzer, without automated control from Examiner (i.e., under the control of the EX280A analyzer application). To do this, uncheck the Analyzer box in the Settings tab.
Electrical Tests Some tests are conducted in three different device states (Default, Addressed, and Configured). Expected results for each state tested may vary. Default State: The device is attached, powered, but has not been assigned a unique address. Device responds at the default address (0).
Addressed Examiner measures current after issuing a Set Address request to assign a non-zero address to the device. Maximum current must be less than 150ma. Default Examiner measures current after issuing a Device Descriptor request. Maximum current must be less than 150ma. Specification Reference Section 11.4.1 5.2 U1 Power Consumption...
Specification Reference Section 11.4.1 5.3 U2 Power Consumption Test Summary This test verifies that the PUT’s power consumption during the U2 low-power state is within the correct limits. Examiner will place the link into U2 from configured, addressed, and default states, using a Link Management Packet (LMP).
Test Steps and Expected Results Examiner brings the link to the U0 state. Examiner issues one or more standard descriptor requests. Examiner places the device into each device state (configured, addressed, and default) in three separate tests before commanding the device to enter U3 in each test. Current is measured once the link is in U3, as described below.
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The device must reach U0 and maintain U0 until Examiner disables the link. Examiner disables the link to force link recovery then repeats the process for the next VBus increment to be tested. This process is repeated until all increments have been tested. Specification Reference Section 11.4.5 Electrical Tests...
Physical Layer When viewing Physical Layer and Link Layer test activity in the USB Explorer 280 analyzer software application, it is generally best that the user disable the “grouping” feature (uncheck Enable Grouping), located in the Grouping drop-down selection in the USB 3.0 Overview.
6.2 SKP Test Test Summary This test verifies that the PUT supports all possible SKP combinations. Here are the combinations to be tested: Repetition of one skip ordered set followed by 354 symbols (word aligned) Repetition of one skip ordered set followed by 353 symbols (word misaligned) ...
Test Steps and Expected Results Examiner configures with an equivalent SSC clock at -5300ppm. Examiner brings the link to U0 as described in TD7.1 (Link Bring-Up Test). The test passes if the exchanges are met, no timeout is detected, all packets are successfully received, all credits are restored, and the link stays in U0 for at least 50ms.
6.5 Polling.LFPS Duration Test Test Summary This test verifies that the PUT’s Polling.LFPS detector supports the entire tBurst and tRepeat duration ranges. Durations to be tested: tBurst = 0.6 us and tRepeat = 6 us tBurst = 0.6 us and tRepeat = 14 us ...
Link Layer Tests When viewing Physical Layer and Link Layer test activity in the USB Explorer 280 analyzer software application, it is generally best that the user disable the “grouping” feature (uncheck Enable Grouping), located in the Grouping drop-down selection in the USB 3.0 Overview. Disabling grouping leaves the user with the low-level view needed for a proper understanding of test sequences that are conducted in Chapters 6 and 7...
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If Examiner is configured as a Downstream Port: Examiner asserts VBUS and terminations. The PUT must move to Rx.Detect. The PUT must transmit Polling.LFPS before tRXDetectQuietTimeout (12ms +50%) + tPollingLFPSEstablished (80us +50%) expires. 2. Examiner transmits Polling.LFPS bursts. The PUT must transmit at least 16 consecutive Polling.LFPS. The PUT must transmit at least 4 consecutive Polling.LFPS after receiving one Polling.LFPS.
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The PUT must NOT transmit TS1s after tPollingActiveTimeout expires (12ms +50%). 5. Examiner transmits TS2 ordered sets and readies to complete the Polling.Configuration handshake. The PUT must transmit at least 16 consecutive TS2s after receiving one TS2. The PUT must NOT interrupt transmission of a TS2 ordered set to transmit a SKP (between TS2 ordered sets is permitted).
Specification Reference Sections 7.2.4.1.1#6 ● 8,10-17,22 ● 7.2.4.1.4#2 ● 7.3.4#2 ● 7.5.6.1#5,6 ● 8.4.5#1 8.4.6#1,3 (downstream) ● 8.4.7#1 (upstream) 7.2 Link Command Framing Test Test Summary This test verifies that the PUT can tolerate link commands having one symbol error in the LCSTART framing.
The tested CRC-5 error conditions are: Incorrect CRC-5 in first Link Command Word Incorrect CRC-5 in second Link Command Word Incorrect CRC in both Link Command Words Test Steps and Expected Results Examiner executes the steps described in section TD7.1 (Link Bring-Up Test) to bring the link to U0, but transmits all LCRD_X link commands with the first condition listed above.
Specification Reference Section 7.3.4#2 7.5 Header Packet Framing Test Test Summary This test verifies that the PUT does not invalidate header packets having one symbol error in the HPSTART framing. The Port Configuration transaction will be used for this purpose. Here are the combinations to be tested: SHP SHP EPF (incorrect symbol is D0.0)
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order to have a known and defined behavior. Combinations to be tested: Data Start Framing SDP SDP EPF (incorrect symbol is D0.0) SDP SDP EPF (incorrect symbol is D0.1) SDP SDP (incorrect symbol is D0.2) SDP SDP SDP (incorrect symbol is D0.3) Data End Framing END END EPF...
The test passes if the exchanges are met, no timeout is detected, all packets are successfully received by the PUT, all credits are restored and the link stays in U0 for at least 50ms. If Examiner is configured as a Downstream Port: a.
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The tested conditions invalidating the header packet are: Incorrect CRC-16 Incorrect CRC-5 A single K symbol in the HP data (see list below), each to be located (one at a time) at the second and fifth characters after the start framing ordered set. Position 2: SHP SHP SHP EPF DX.X KX.X...
Examiner waits for the PUT Port Configuration Ack LMP. If Examiner is configured as a Downstream Port: a. It waits for the PUT Port Capability LMP. b. It transmits its PUT Port Capability LMP with the first invalid condition above. It verifies the PUT replies with an LBAD.
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If Examiner is configured as an Upstream Port: a. It waits for the PUT’s Port Capability LMP. b. It responds to the PUT with an LBAD. It waits for the PUT to transmit an LRTY. d. It waits for the retransmitted packet. e.
The test passes if the exchanges are met, no timeout is detected, the packet that Examiner responded to with an LBAD is retransmitted correctly, all other packets are received successfully, all credits are restored and the link stays in U0 for at least 50ms. Specification Reference Section 7.2.4.1.3#1, 2 7.9 PENDING_HP_TIMER Deadline Test...
CREDIT_HP_TIMER deadline value 5000us. value tLinkTurnAround is 500ns and is defined in the USB 3.0 Link Layer Test Specification, Section 4. Please refer to that document for details. The test passes if the exchanges are met, no timeout is detected, all packets are successfully received, all credits are restored and the link stays in U0 for at least 50ms.
The PENDING_HP_TIMER deadline value is 3us, but is given a “calculated test time” expiration of 5.0225us. This calculated test time is defined and explained in the Link Layer Test Specification, Section 4. Please refer to that document for details Examiner will keep the link active by sending Link Pollings (LUP when Examiner is configured as Upstream Port, LDN when Examiner is configured as a Downstream Port).
Specification Reference Section 7.2.4.1.10#6 ● Table 7-7 7.13 Wrong Header Sequence Test Test Summary This test verifies that the PUT will go to recovery when it receives a wrong header sequence number. Test Steps and Expected Results Do steps 1 to 4 of TD7.1 (Link Bring-Up Test), with the exception that Examiner will send two LMP packets with Header Sequence Number set to 0 (i.e., not sequential).
The value of tLinkTurnAround is 500ns and is defined in the USB 3.0 Link Layer Test Specification, Section 4. Please refer to that document for details. The test passes if the PUT goes to recovery within tLinkTurnAround after reception of the second LGOOD_0. Specification Reference Section 7.3.4#4 7.15 Wrong LCRD_X Sequence Test...
The value of tU0RecoveryTimeout deadline is 1ms, but is given a “calculated test time” expiration of 1.5080ms. This calculated test time is defined in the USB 3.0 Link Layer Test Specification, Section 4. Please refer to that document for details. Examiner will disable transmission of ITPs for testing an Upstream Port.
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In the first part, Examiner will not send any LMPs. In the second part, Examiner will send a Port Capabilities LMP, but will not send Port Configuration LMP (or Port Configuration ACK LMP). In the third part, Examiner will send a Port Configuration LMP (or Port Configuration ACK LMP), but will not send a Port Capabilities LMP.
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The test fails if the PUT does not transition to SS.Disabled after tPortConfiguration calculated test time (20.6us). The test fails if the PUT transitions to SS.Disabled before tPortConfiguration deadline (20us), or sends any other packets or LFPS signals at this point. If Examiner is configured as an Upstream Port: Examiner performs steps 1 to 3 of TD7.1 (Link Bring-Up Test) to bring the link to U0, and does not transmit any LMP.
The test fails if the PUT does not transition to SS.Inactive after tPortConfiguration calculated test time (20.6us). The test fails if the PUT transitions to SS.Inactive before tPortConfiguration deadline (20us), or sends any other packets or LFPS signals at this point. Specification Reference Section 7.5.6.2#10, 11 7.18 Low Power Initiation for U1 Test (Downstream...
Between 300ns – 900ns elapses between the start of Examiner U1 Exit LFPS and the start of the PUT U1 Exit LFPS. The PUT U1 Exit LFPS duration is within 600ns – 900ns. The test passes if all transactions are correct, no extra packets or LFPS signals are received, and the PUT enters Recovery.
Examiner transmits the U2 Exit LFPS to transition to U0 and waits to receive U2 Exit LFPS from the PUT. The test fails if the LFPS handshake does not conform to the following specifications from section 6.9.2: Between 300ns – 2ms elapses between the start of Examiner U2 Exit LFPS and the start of the PUT U2 Exit LFPS.
After receipt of the LGO_U1 from the downstream port, Examiner transmits an LAU at [PM_LC_TIMER – tLinkTurnAround], i.e., at 2.5us after the LGO_U1. The value of PM_LC_TIMER deadline is 3us. The value of tLinkTurnAround is 500ns. See Section 4 of the Link Layer Test Specification for more details.
The test fails if the PUT does not transition to Recovery when the PM_LC_TIMER expires (5.0225us). After Examiner completes this test case, clear the U1/U2 registers through the CV prompt. Specification Reference Sections 7.2.4.2.1#1 ● 7.2.4.2.3#6 ● 7.3.4#6 7.22 PM_ENTRY_TIMER Timeout Test (Upstream Port Only) Test Summary This test verifies that the PUT transitions to U1 when the PM_ENTRY_TIMER expires.
Examiner transmits the Set Link Function LMP with the Force_LinkPM_Accept bit asserted. Examiner transmits LGO_U1 and waits to receive an LAU from the PUT. The test fails if the PUT does not send an LAU. Examiner transmits an LPMA and then transitions to U1. The test fails if the PUT does not transition to U1, or if the PUT sends any packet at this point.
Examiner transmits an LPMA and then transitions to U2. The test fails if the PUT does not transition to U2, or if the PUT sends any packet at this point. Examiner waits 100ms from U2 entry then transmits a U2 Exit LFPS to transition to U0, then waits to receive U2 Exit LFPS from the PUT.
Examiner transmits an LPMA and then transitions to U3. Examiner waits 500ms from U3 entry then transmits the U3 Exit LFPS to transition to U0, then waits to receive U3 Exit LFPS to complete the U3 Exit LFPS handshake The test fails if the LFPS handshake does not conform to the following specifications from section 6.9.2: ...
The PENDING_HP_TIMER deadline value is 3us, but is given a “calculated test time” expiration of 5.0225us. This calculated test time is defined and explained in the Link Layer Test Specification, Section 4. Please refer to that document for details. Both Examiner and the PUT transition to Recovery, and then back to U0. The test fails if the PUT does not transition to recovery when the PENDING_HP_TIMER expires (from 3us to 5.0225us).
The test fails if the PUT does not transition to U0. The test fails if the PUT does not transmit the Header Sequence Number Advertisement and the Rx Header Buffer Credit Advertisement once in U0. Examiner and the PUT exchange Port Configuration transactions. The test fails if the Port Configuration exchange sequences are not successful.
The test fails if the PUT does not transmit the Header Sequence Number Advertisement and the Rx Header Buffer Credit Advertisement once in U0. Examiner keeps the link active by sending LDNs for 20us. The test fails if the PUT transmits the Port Capability LMP. Specification Reference Sections 7.2.4.1.1#6,8,17,22 ●...
The test fails if the PUT does not transmit the Header Sequence Number Advertisement and the Rx Header Buffer Credit Advertisement once in U0. Examiner keeps the link active by sending LDNs for 20us. The test fails if the PUT transmits the Port Capability LMP. Specification Reference Sections 7.2.4.1.1#6,8,17,22 ●...
If Examiner is configured as a Downstream Port: a. LVS waits for the PUT Port Capability LMP. b. LVS transmits its PUT Port Capability LMP with invalid CRC-5. LVS verifies the PUT replies with an LBAD. d. LVS transmits a LRTY and then retransmits the packet with invalid CRC-5. e.
Examiner software prompts the test operator to initiate a Hot Reset on the PUT through USB30CV. Examiner waits for the PUT to send TS1s. The test fails if TS1s are not sent by the PUT. When Examiner detects TS1s from the PUT, it starts the tHotResetTimeoutToWarmReset timer.
Examiner presents terminations and waits for the PUT to present terminations. When Examiner detects Terminations from the PUT, Examiner starts the tPollingLFPSTimeout timer and does not transmit an LFPS. The value tPollingLFPSTimeout deadline is 360ms, but is given a “calculated test time”...
The value tPollingLFPSTimeout deadline is 360ms, but is given a “calculated test time” expiration of 542.7005ms. This calculated test time is defined in the USB 3.0 Link Layer Test Specification, Section 4. Please refer to that document for details. When the timer expires, Examiner verifies that the device is in Compliance Mode by sending Ping.LFPS until it can verify that Examiner is receiving a Compliance Pattern, (at most by the COMs in the 4th Compliance Pattern).
Examiner waits to receive an LGO_U3 from the PUT. Examiner sends an LAU when it receives the LGO_U3 from the PUT. Examiner waits to receive an LPMA from the PUT. The test fails if Examiner does not receive an LGO_U3, LPMA, or fails to transition to U3.
Examiner will be enumerated by the host PUT as a device. Examiner software prompts the test operator to put the host controller machine to sleep. Examiner waits to receive an LGO_U3 from the PUT. Examiner sends an LAU when it receives an LGO_U3 from the PUT. Examiner waits to receive an LPMA from the PUT.
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Examiner sends a SETUP packet to initiate a Device Descriptor transfer. The Packet Pending (PP) bit is set (1) in this packet. This bit remains set (1) through the IN phase. In the Status Phase of the Device Descriptor transfer, Examiner clears (0) the PP bit. The test fails if the GetDescriptor request is not completed.
Mass Storage Class Tests Tests in this section are derived from the USB Mass Storage Device Compliance Specification, available at www.usb.org. Examiner will not make these tests available unless the device under test includes a mass storage interface. In most test cases in this section, testing begins with a sequence that includes an Inquiry command, a Test Unit Ready Command, and a Read Capacity command.
The test fails if any of the requirements listed below are not met: Configuration descriptor must contain at least 9 bytes bInterfaceSubClass must be in the range 0x01 - 0x06 bNumEndpoints >= 2 bInterfaceProtocol must be 0x50 (BOT) or 0x00 or 0x01 (CBI) or 0x62 (UAS) ...
The test fails if any of the requirements listed below are not met: Device descriptor must contain at least 18 bytes Configuration descriptor must contain at least 9 bytes The iSerialNumber != 0 Language IDs descriptor must contain at least 4 bytes ...
The test fails if any of the requirements listed below are not met: The PUT must stall or complete this request The PUT must return one byte as requested The PUT must reply with Max LUN in the range of 0x00 through 0x0F inclusive Examiner sends four incorrect Get Max LUN requests, followed by a correct Get Max LUN request.
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Examiner issues a Read Capacity command with an incorrect signature in the command block word. Device must complete the command transport. Examiner sends a series of IN and OUT requests, then sends a Get Status to the IN endpoint. Device must stall the IN requests and respond as halted to the Get Status request.
12. Examiner sends a Test Unit Ready command. Device must complete the Test Unit Ready command. Specification Reference USB Mass Storage Device Compliance Specification TD1.4. 8.5 Case 1 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hn = Dn: neither host nor device want to transfer data.
Specification Reference USB Mass Storage Device Compliance Specification TD1.5. 8.6 Case 2 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hn < Di: host wants to transfer no data, device wants to transfer data Test Steps and Expected Results Examiner initializes the link to U0.
Specification Reference USB Mass Storage Device Compliance Specification TD1.6. 8.7 Case 3 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hn < Do: host wants to transfer no data, device wants to transfer data OUT.
Specification Reference USB Mass Storage Device Compliance Specification TD1.7. 8.8 Case 4 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hi > Dn: host wants to transfer data IN, device wants to transfer no data.
Specification Reference USB Mass Storage Device Compliance Specification TD1.8. 8.9 Case 5 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hi > Di: host wants to transfer data IN, device wants to transfer less data IN.
Specification Reference USB Mass Storage Device Compliance Specification TD1.9. 8.10 Case 6 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hi = Di: host and device want to transfer the same amount of data. Test Steps and Expected Results Examiner initializes the link to U0.
8.11 Case 7 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hi < Di: host wants to transfer data IN, device wants to transfer more data IN. Test Steps and Expected Results Examiner initializes the link to U0.
8.12 Case 8 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Hi <> Do: host wants to transfer data IN, device wants to transfer data OUT. Test Steps and Expected Results Examiner initializes the link to U0.
8.13 Case 9 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Ho > Dn: host wants to transfer data OUT, device wants to transfer no data. Test Steps and Expected Results Examiner initializes the link to U0.
8.14 Case 10 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Ho <> Di: host wants to transfer data OUT, device wants to transfer data IN. Test Steps and Expected Results Examiner initializes the link to U0.
8.15 Case 11 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Ho > Do: host wants to transfer data OUT, device wants to transfer less data OUT. Test Steps and Expected Results Examiner initializes the link to U0.
8.16 Case 12 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Ho = Do: host and device want to transfer to same amount of data OUT. Test Steps and Expected Results Examiner initializes the link to U0.
8.17 Case 13 Test Test Summary Examiner sends a series of mass storage class requests intended to confirm the case: Ho < Do: host wants to transfer data OUT, device wants to transfer more data OUT. Test Steps and Expected Results Examiner initializes the link to U0.
8.18 bCB Length Test Test Summary This test verifies that the device under test ignores all bytes in the CBWCB field beyond what is indicated by bCBWLength. Examiner sends three Inquiry commands, each padded with different values (0xFF, 0x55, and 0xAA) from Byte 6 through Byte 15 and verifies that the device properly completes these requests.
For PDT (device type) = 07h, 00h, 0Eh, required commands include Inquiry, Read (10), Request Sense, Test Unit Ready, Read Capacity, and Write (10). For PDT (device type) = 05h, required commands include Inquiry, Read (12), Request Sense, Test Unit Ready, Read Capacity, Start/Stop Unit, Read TOC/PMA/ATIP, and Write (12).
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For PDT (device type) = 07h, 00h, 0Eh, optional commands include Mode Sense (10), Read (12), Write (12) Mode Select (6), Mode Select (10), Mode Sense (6), Prevent/Allow Medium Removal, Read Format Capacity, Start/Stop Unit, and Synchronize Cache. For PDT (device type) = 05h, optional commands include Mode Sense (10), Read (10), Write (10), Mode Select (6), Mode Select (10), Mode Sense (6), Prevent/Allow Medium Removal, Read Format Capacity, and Synchronize Cache.
Device Framework Tests Tests in this section are derived from the USB Command Verifier (CV) Compliance Test Specification for the USB 3.0 Architecture, available at www.usb.org. 9.1 Device Descriptor Test Test Summary Examiner checks the device descriptor for proper format. The test is performed three times- once each for the default, addressed, and configured states.
Specification Reference USB Command Verifier Compliance Test Specification TD9.1. 9.2 Standard Configuration Descriptor Test Test Summary Examiner verifies that the configuration descriptor request is completed properly. The test is performed three times- once each for the default, addressed, and configured states. Test Steps and Expected Results Examiner initializes link to U0.
Bits D0 through D4 of the bmAttributes field in the Configuration Descriptor must be equal to 00000b. Bit D7 of the bmAttributes field in the Configuration Descriptor must be equal to 1b. If the SelfPowered bit in the Configuration Descriptor is set to 1b, the bMaxPower field should be set to less than 0x18 (144ma).
For interface 0, bInterfaceNumber must be equal to 0 (0x00). For interface 0, bAlternateSetting must be equal to 0 (0x00). The bLength filed in the Interface Descriptor(s) must be greater than 8 (1000b). The bDescriptorType field in the Interface Descriptor must be equal to INTERFACE (0x04).
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The bLength field in the Configuration Descriptor must be equal to 0x09. The bDescriptorType field in the Configuration Descriptor must be equal to CONFIGURATION (0x02). The Device Descriptor must contain at least 18 bytes. The bLength field in each Endpoint Descriptor must be greater than 6 bytes. The bDescriptorType field in each Endpoint Descriptor must be equal to ENDPOINT (0x05).
9.6 SuperSpeed Endpoint Companion Descriptors Test Test Summary Examiner verifies that all Endpoint Companion Descriptors are formatted properly. Some checks are also made on the Configuration Descriptor. The test is performed three times- once each for the default, addressed, and configured states. Test Steps and Expected Results Examiner initializes link to U0.
9.7 BOS and Device Capabilities Descriptor Test Test Summary Examiner verifies that all BOS Descriptors are formatted properly, including device capability sub-descriptors that are returned with BOS Descriptor requests. The test is performed three times- once each for the default, addressed, and configured states. Test Steps and Expected Results Examiner initializes the link to U0.
The bLength field in the required SuperSpeed USB sub-descriptor must be equal to ten (0x0A). Bit D0 in the bmAttributes field of the SuperSpeed USB sub-descriptor is reserved and must be set to zero. Bits D2 through D7 in the bmAttributes field of the SuperSpeed USB sub- descriptor are reserved and must be set to zero.
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Configuration Descriptor The first Configuration descriptor must be at least 9 bytes in length. The second Configuration descriptor must be equal in length to the value of the wTotalLength field received in the first request. Examiner issues a request for String 0 (Language ID). Examiner may issue more than one request for String 0, and all requirements listed below apply to each request.
9.9 Halt Endpoint Test Test Summary Examiner issues a series of requests (Get Status, Set Feature, Clear Feature, Get Status) to ensure the device’s bulk and interrupt endpoints properly enter and exit a Halt status. Several fields in the Configuration and Interface descriptors are also checked. Test Steps and Expected Results Examiner initializes link to U0.
The Interface settings returned in the Get Interface, including the Alternate setting, corresponds with the request. Examiner issues a sequence of Get Status, Set Feature (Halt), Get Status, Clear Feature (Halt), and Get Status to each interrupt and bulk endpoint. The endpoint under test halts after the Set Feature and is no longer halted after the Clear Feature.
9.11 Bad Feature Test Test Summary Examiner issues a Set Feature request with the wValue field set to an invalid value and verifies the device stalls this request, as well as a Clear Feature request. Examiner also verifies that the device remains alive after the Set Feature and Clear Feature requests by verifying proper response to a Device descriptor request.
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Test Steps and Expected Results Examiner initializes link to U0. Examiner issues several standard descriptor requests. Examiner issues a request for the Configuration Descriptor. The Configuration Descriptor must be at least 9 bytes in length. Examiner issues a Set Configuration (1) followed by a Get Configuration request. The device must indicate a change to configuration 1.
9.14 Reserved 9.15 Reserved 9.16 Enumeration Test Test Summary Examiner brings the link to U0, disables the link then initiates a recovery to bring the link back to U0. Several standard descriptor requests are issued once the link is in U0. This process is repeated to enumerate the device 20 times.
Examiner issues a Get Status (Device) request. Bit D0 (SelfPowered) of the data returned in the Get Status request must match the actual power implementation employed by the device (self- powered or bus-powered). Examiner issues a Get Configuration request. Bit D6 (SelfPowered) of the bmAttributes field in the Configuration Descriptor must match Bit D0 (SelfPowered) of the data previously returned in the Get Status request.
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10. Hub Tests This section in-process. Contact Ellisys for more information. 124 of 124 | Hub Tests...
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