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EN 54
9.
LC4.1E AB
9.5
Video: TV Part (diagrams B1, B2, and B3)
Video IF
Tuner
AV1 In
(YPbPr or
CVBS for AP/
LATAM/USA)
SCART1 In
(CVBS,RGB,F
BL) only for
Europe
CVBS_Y_IN
Side AV
(YC or CVBS)
C_IN
for all region
Scart1 Out
CVBS for
Europe only
The video processing is completely handled by the Hercules
•
IF demodulator.
•
Chrominance decoder
•
Sync separator.
•
Horizontal & vertical drive.
•
RGB processing.
•
CVBS and SVHS source select.
It has also build in features like:
•
CTI.
•
Black stretch.
•
Blue stretch.
•
White stretch.
•
Slow start up.
•
Dynamic skin tone correction etc.
Further, it also incorporates sound IF traps and filters, and
requires only one crystal for all systems.
9.6
Video: Scaler Part (diagram B6, B7, and B8)
The Genesis gm5221 Scaler is an all-in-one graphics and
video processing IC for LCD monitors and televisions with up
to XGA output resolutions. The Scaler controls the display
processing in an LCD TV, e.g. like the deflection circuit in a
CRT-based TV. It controls all the view modes (e.g. like
"zooming" and "shifting"). Features like PC (VGA) or HD inputs,
are also handled by this part.
9.6.1
Features
The Scaler provides several key IC functions:
•
Scaling.
•
Auto-configuration/ Auto-Detection.
•
Various Input Ports:
–
Analog RGB.
–
Video Graphics.
•
Integrated LVDS Transmitter.
•
On-chip Micro-controller
Circuit Descriptions, Abbreviation List, and IC Data Sheets
Hercules
AM
Demodulator
De-
matrix
CVBS1
Video Switching
Matrix
YUV
interface
and
processing
B/Pb-3(Pin 80)
G/Y-3(Pin 79)
R/Pr-3(Pin 78)
Sync
Separator
CVBS2/Y2(Pin 55)
INSSW3(Pin 77)
CVBS3/Y3(Pin 58)
C2/C3(Pin 59)
DVBO/IFVO/
FMRO(Pin 43)
Figure 9-2 Block diagram video processing
when using SM5301BS, Low Pass Filter circuit is
not needed. Otherwise, LPF circuit is needed.
27
Ro
Video
3
Go
Buffer and
Bo
Low Pass
Filter
7
25,1,5
V-SDTV(Pin 23)
to 555 trigger
74HC4053
circuit
H_CS_SDTV(Pin
67) to 555 trigger
circuit
H/V
VGA D-sub
PC Input
(RGB-HV)
HD Input
RCA-to-VGA
Adaptor(YPbPr)
9.6.2
Inputs
Analog RGB
The RGB input is fed to pins 142, 143, 147, 148, 151 and 152.
This input consists of either the Hercules RGB output or the
RGB/YpbPr input of the VGA connector. The Scaler can switch
between the two signals via the PC_HD_SEL signal and
selection IC SM5301 (7461).
PC DVI-D/-I/VGA input
It depends on the model of the TV set, if a DVI-I or DVI-D
connector is present. If a DVI to VGA adaptor is used, the
analogue DVI input is processed by the VGA block of the
Scaler. Digital signals coming from the DVI input are directly
processed by the Scaler. The Scaler supports up to 1080i and
UXGA 60Hz formats.
9.6.3
Output
The Display Output Port provides data and control signals that
permit the Scaler to connect to a variety of display devices
using a TTL or LVDS interface. The output interface has four
channel 6/8-bit LVDS transmitters and is configurable for single
or dual wide LVDS. All display data and timing signals are
synchronous with the DCLK output clock. The integrated LVDS
transmitter is programmable to allow the data and control
signals to be mapped into any sequence depending on the
specified receiver format.
Scaler
Analog Input Port
SM5301BS-G Video
Filter LSI
RGB/
YPbPr,SOG
MUXSEL
VFC
Through
21
22
23
99
89
PC_HD_SEL
Schmitt
Trigger
181,182
Circuit
88
SD_PCHD_SEL
LCD
Panel
E_14520_047.eps
160904
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