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120MHz
LOOP
ASSEMBLY
120MHz
LOOP ASSEMBLY
19-0849
(Fig. 18)
Introduction
4.90
Referring
to
the
block diagram
Fig.
3. 2.,
this
assembly
contains a voltage
controlled
oscillator
(VC02)
operating
in
a
phase locked
loop,
synchronized
to
the
master
frequency
standard
and
providing the following
faci
I
i
ties:
—
(
1
)
A
120MHz
reference frequency
for
the
Range
1
mixer
process.
(2)
A
10MHz
reference
for
the display
counter.
(3)
A
300kHz
reference
for
use
in
the logic
assembly.
The
circuitry
to
the
left
of
Q4
and
Q5
in
Fig.
18
is
ECL
and
that
to
the right
is
TTL.
120MHz
Oscillator
4.91
Referring
to
Fig.
18 the
120MHz
Oscillator
is
Q3
and
associated
components,
voltage tuned
by
the loop
'error'
voltage supplied from
the
phase detector IC4
pin 8
,
via
LI
and
R 8
,
to
the
varactor
diode D1
.
The
oscillator
output
is
inductively
coupled
to
the
base of amplifier
Q1
via
LI
and
the printed wiring inductor.
An
output
is
obtained from
Q
1
when
Q
2
is
turned on
by
the
Range
1
logic at pin 15.
The
signal
is
fed out via Cl to
SK
8
.
(The
range
logic
at pin
15
is
an
inverted
level
obtained
via
Q
8
in
the
Counter Assembly).
4.92
The
output
at
Q3
source
drives the
~4
package
IC 8
a/IC
8
b.
From
IC 8 b a
30MHz
signal
is
fed
to
the
phase detector path via
I
C8b/1 5 and
to
the
300kHz
divider
path via
IC8b/14.
Phase Detector Path
and
Display Blanking
4.93
The
30MHz
signal
is
divided
by
3
in
ICla/IClb and
the resulting
10MHz
is
fed
through the
ECL-to-TTL
level
converter
Q5
to
the
output
at pin 14,
and
to
the
divider IC5
which
provides a
5MHz
reference output
at pin
4 and
a
1MHz
input
to
the
phase
detector IC4.
The phase
detector
compares
the
1MHz
oscillator signal
with
the
1MHz
master
reference
signal
at
IC4/1,
and any frequency
difference produces
an
'error'
voltage
which
tunes the
oscillator
Q3
to
bring the
two
frequencies
into
lock.
The
error
voltage
is
also
fed
via
R35
to
pin 10
to
blank
the
digits
in
the counter display
if
the
120MHz
loop goes
out
of
lock
(para
.
4.118).
300kHz
Reference
Output
4.94
The
30MHz
oscillator signal
from
IC8b/14
is
fed through the
ECL-to-TTL
level
converter
Q4
to
drive the
-
7
-
100
stage
IC3/IC2, which
provides a
300kHz
reference output
at
SK95.
4-15
9081
&
9082 Vol
.
2
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